IAP (In Application Programming) for Flash on STM32F407ZE

[johnsotack9]

Posted on February 04, 2013 at 16:50

How long is the bus stalled for program Flash block erase and program operations?

I would like to write to and erase Flash sectors while running an application from Flash in sectors not being modified.  Reading about IAP it appears the flash bus gets stalled when a flash erase or write is in progress.  However, I could not find how long the bus is stalled. Ideally I would like to continue with a fully functional application while modifying flash but am concerned timing may be impacted while doing so.  John

[Tesla DeLorean]

Posted on February 04, 2013 at 17:10

Table 38, Page 100, Flash memory programming

http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/DM00037051.pdf

Worst time in the order of 4 SECONDS, but often 1 or 2 for 128KB sector erase. Not so hot for real time operation. The 1MB (all 90 nm die <=1MB) have a single bank, mess with any part of it and try to read/execute processor will stall. The 2MB 70 nm part promises two banks, which permit read/execute in one, and erase/write in the other without stalling.

[johnsotack9]

Posted on February 04, 2013 at 17:22

Thats what I needed to know.  I like the double Flash block concept but do not have it available this time.  The IAP should be a large improvement over running out of RAM.

John

[Tesla DeLorean]

Posted on February 04, 2013 at 18:05

The IAP should be a large improvement over running out of RAM.

Depends a lot on the protocol used. Something like XMODEM with intrinsic flow control works a lot better than trying to service a byte level USART IRQ, and a 100 us stall. Better to stage the data somewhere and do the erase/write when there are no real time constraints.