Posted on May 17, 2011 at 12:56Quote:
On 12-12-2008 at 02:59, Anonymous wrote:
After power on, HSI is on by default. No need to write any code to turn it on.
I have a J-Link v5.0 and Olimex STM32-P103 development board with programmed STM32F103RBT6 microcontroller.
Reading the flash or RAM memory contents using Segger JFlashARM.exe v4.00a utility is always OK.
But when I`am trying to program or erase the flash memory it ends up with error message (erase timeout) in chance of 50%.
This is the log of JFlashARM.exe just before the error message:
Quote:
T0674 006:634 JLINKARM_WriteReg(R0, 0x00000001) returns 0x00 (0000ms, 0603ms total)
T0674 006:634 JLINKARM_WriteReg(R1, 0x08000000) returns 0x00 (0000ms, 0603ms total)
T0674 006:634 JLINKARM_WriteReg(R2, 0x08000000) returns 0x00 (0000ms, 0603ms total)
T0674 006:634 JLINKARM_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 0603ms total)
T0674 006:634 JLINKARM_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 0603ms total)
T0674 006:634 JLINKARM_WriteReg(R13, 0x200002D4) returns 0x00 (0000ms, 0603ms total)
T0674 006:634 JLINKARM_WriteReg(R15, 0x20000006) returns 0x00 (0000ms, 0603ms total)
T0674 006:634 JLINKARM_GoIntDis() >0x1C0 JTAG> >0x110 JTAG> >0x110 JTAG> >0x110 JTAG> >0x110 JTAG> >0x170 JTAG> >0x140 JTAG> (0023ms, 0626ms total)
T0674 006:657 JLINKARM_IsHalted() >0xB0 JTAG> returns FALSE (0003ms, 0626ms total)
T0674 006:660 JLINKARM_IsHalted() >0xB0 JTAG> returns FALSE (0003ms, 0626ms total)
T0674 006:663 JLINKARM_IsHalted() >0xB0 JTAG> returns FALSE (0003ms, 0626ms
..............
The execution never returns after jumping at 0x20000006.
This is page erase subroutine address.
All other subroutine calls just before returns OK.
The problem has been solved by editing my code and removing initialization sequence which disables HSI (internal RC) clock generator after switching to PLL.
This is what I can`t understand.
1. Is the STM32 flash controller needs HSI clock to be powered on and working during programming?
2. Why this clock source still in shut down after connection between the MCU core and the J-Link emulator has been established, i.e after microcontroller reset?
Inserting big delay (~800 ms) just after MCU reset and before initialization code (HSI shut down sequence) takes place does nothing to prevent page erase subroutine lock-up.
Ok, I see that HSI is really needed for flash controller to work.
But how about second question?
The MCU core even after reset and emulator connection still have its HSI generator disabled?
I`ll be very grateful If someone can explain such a problem.
Thanks in advance.
PS. Sorry for bad english :)
