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How to move vector table to RAM in stm32f1 devices

Javier1
Principal

To reduce latency time of interruptions.

Based on the same thing but in stm32f0 devices

we dont need to firmware by ourselves, lets talk
1 ACCEPTED SOLUTION

Accepted Solutions
Javier1
Principal

In main.c

/* USER CODE BEGIN PD */
     #define VECTOR_TABLE_SIZE (67 + 1 + 13 +9)//67 positive vectors, 0 vector, and 13 negative vectors (and extra 9 i dont know why)
/* USER CODE END PD */

/* USER CODE BEGIN PV */
volatile uint32_t __attribute__((section(".ram_vector,\"aw\",%nobits @"))) ram_vector[VECTOR_TABLE_SIZE];
extern volatile uint32_t g_pfnVectors[VECTOR_TABLE_SIZE];
/* USER CODE END PV */

/* USER CODE BEGIN 1 */
    RCC->CR |= RCC_HSI_ON;  // early enable to ensure clock is up and running when it comes to usage
    for (uint32_t i = 0; i < VECTOR_TABLE_SIZE; i++) {//copy vector table
      ram_vector[i] = g_pfnVectors[i];
    }
  /* USER CODE END 1 */

In system_stm32f1xx.c, uncomment the #define USER_VECT_TAB_ADDRESS

and #define VECT_TAB_SRAM

#define USER_VECT_TAB_ADDRESS */
 
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
     in Sram else user remap will be done in Flash. */
 #define VECT_TAB_SRAM
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS   SRAM_BASE       /*!< Vector Table base address field.
                                                     This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
                                                     This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
                                                     This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET         0x08004800     /*!< Vector Table base offset field.
                                                     This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */

In the linker script (.ld)

.fini_array :
  {
    . = ALIGN(4);
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP (*(SORT(.fini_array.*)))
    KEEP (*(.fini_array*))
    PROVIDE_HIDDEN (__fini_array_end = .);
    . = ALIGN(4);
  } >FLASH
 
/*javi*/
/*https://community.st.com/s/question/0D53W00000trgpiSAA/how-to-boot-to-random-address-without-vecttaboffset-stm32f072*/
  /* redirected vector must go to top of the RAM  */
  .ram_vector :
  {
    *(.ram_vector)
  } >RAM
/*javi*/

we dont need to firmware by ourselves, lets talk

View solution in original post

1 REPLY 1
Javier1
Principal

In main.c

/* USER CODE BEGIN PD */
     #define VECTOR_TABLE_SIZE (67 + 1 + 13 +9)//67 positive vectors, 0 vector, and 13 negative vectors (and extra 9 i dont know why)
/* USER CODE END PD */

/* USER CODE BEGIN PV */
volatile uint32_t __attribute__((section(".ram_vector,\"aw\",%nobits @"))) ram_vector[VECTOR_TABLE_SIZE];
extern volatile uint32_t g_pfnVectors[VECTOR_TABLE_SIZE];
/* USER CODE END PV */

/* USER CODE BEGIN 1 */
    RCC->CR |= RCC_HSI_ON;  // early enable to ensure clock is up and running when it comes to usage
    for (uint32_t i = 0; i < VECTOR_TABLE_SIZE; i++) {//copy vector table
      ram_vector[i] = g_pfnVectors[i];
    }
  /* USER CODE END 1 */

In system_stm32f1xx.c, uncomment the #define USER_VECT_TAB_ADDRESS

and #define VECT_TAB_SRAM

#define USER_VECT_TAB_ADDRESS */
 
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
     in Sram else user remap will be done in Flash. */
 #define VECT_TAB_SRAM
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS   SRAM_BASE       /*!< Vector Table base address field.
                                                     This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
                                                     This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
                                                     This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET         0x08004800     /*!< Vector Table base offset field.
                                                     This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */

In the linker script (.ld)

.fini_array :
  {
    . = ALIGN(4);
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP (*(SORT(.fini_array.*)))
    KEEP (*(.fini_array*))
    PROVIDE_HIDDEN (__fini_array_end = .);
    . = ALIGN(4);
  } >FLASH
 
/*javi*/
/*https://community.st.com/s/question/0D53W00000trgpiSAA/how-to-boot-to-random-address-without-vecttaboffset-stm32f072*/
  /* redirected vector must go to top of the RAM  */
  .ram_vector :
  {
    *(.ram_vector)
  } >RAM
/*javi*/

we dont need to firmware by ourselves, lets talk