Anyone recommend JTAG pull up/downs?

[miles]

Posted on June 26, 2008 at 17:33

Anyone recommend JTAG pull up/downs?

[miles]

Posted on May 17, 2011 at 12:38

http://www.st.com/stonline/products/literature/an/13675.pdf

says that the JTAG input pins have internal pull-up (JNTRST, JTDI, JTMS) and pull-down (JTCK), and there's no need for external pulls. However, it doesn't say what the resistance values are. I noticed on my Olimex eval board there are 10k pull-ups on all JTAG pins including JTCK, which has an internal pull-down. It seems bad that there's an internal pull-down and external pull-up on the same pin. Assuming the internal pulls are the same as GPIOs (40k nominal, 30k min, 50k max), worst case that'll be a 30k pull down and a 10k pull up, making a voltage divider that'll result in about 2.5 volts, not very far from the 2.0V high level threshold. Well, it's probably far enough from the threshold to not cause problems, but it'd be better to have the pin at ground or Vcc, right? The 40k from Vcc to ground will also waste about a 10th of a milliamp, which in my case I don't care about, but perhaps someone operating off a battery would. So, are the JTAG pulls the same as GPIO pulls? And if so, is the general consensus that they are strong enough to avoid any EMI related problems, and that no external pull up/downs are needed? I'm not going to be operating in an EMI harsh environment, but I'd rather be safe than sorry. I realize the manual says you don't need pulls, but I've seen that before with other processors, and it was still common practice to add external ones. Thanks, Miles

[viktor3]

Posted on May 17, 2011 at 12:38

I use STM32 with ULINK2 in SWD mode with no resistor on the pins and all work fine

[lanchon]

Posted on May 17, 2011 at 12:38

hi miles,

yes, that's a bug in all three STM32 olimex boards. I didn't bother to tell olimex, maybe someone should. I'd remove the pullup from the JTCK line. > So, are the JTAG pulls the same as GPIO pulls? very probably. the manual says that whenever the JTAG port is enabled the pulls are also. and it says that the reset forces GPIO pulls to an off state. however, if you read the GPIO regs after reset you'll find that the bits corresponding to the JTAG port pins are not in the state the manual says they should be. instead you'll find that pullups are enabled for all JTAG pins except JTCK, for which the pulldown is on. I believe the manual is wrong when it says that enabling JTAG forces the pulls on: they're probably totally independent and the pulls are there just because they're in that state out of reset. someone should program the JTCK pin as pullup without disabling JTAG. if the pin goes up, it means that JTAG and pulls are independent.