I'm currently working on a NUCLEO-H723 board , trying to improve performance of FileX/LevelX.
First of all, seems cache is enabled (FX_DISABLE_CACHE is commented) and LX_NOR_SECTOR_MAPPING_CACHE_SIZE is set to 8.
I'm trying to access to the first 8 bytes of a file consequently but each time i trigger a read it always falls into the LX driver in charge of reading over DMA to the ext flash.
Is cache really working or not?
Then while working on that i tried to enable LX_DIRECT_READ, hoping that this will do a read access directly to the memory-mapped octo-spi flash. Nothing work , but a question raised: where do i have to set the base-address for the memory-mapped read access?
Thanks in advance to all