Background of a problem:
I am using ST low level libraries for USB OTG and USB HOST. I wrote my own USB class for ASIX USB-ETH adapter based on template and CDC class. The problem was that solution presented by ST driver was to slow. I could only send 64 bytes using USBH_BulkSendData(USB Full Speed), so transfer speed was very slow. I've changed the driver to send more data in one USBH_BulkSendData call, filling as much bytes as available in FIFO, then put rest of them in FIFO empty callback(or in several callback). This speed up the transfer, but here comes the issue.
After some transfers(sometimes a few, sometimes a lot) when I put words into TX FIFO something fails. As I understand after successful transaction USB Core decrements PKTCNT[9:0] in OTG_HCTSIZx register.
In my case when there are 164 bytes left to send before I put them into FIFO in this register there are values:
But after filling FIFO I never receive XFRC interrupt and when I look into registers there are:
So it looks like after after sending first packet PKCNT decrements to 2, XFRSIZ to 100, then after second packet PKCNT decrements to 1 but XFRSIZ is still 100.
I've tried a lot of things and for me it looks like something went wrong in USB core and registers where not decrement properly. Also there is no interrupt like NACK, STALL or any other.
My second question, because RM says that PKCNT is decremented after successful transaction, but nothing about XFRSIZ, but from my observation I can tell it is also decremented. Am I right?
EDIT:
OTG_HNPTXSTS shows that there are 87 words available(my full TX FIFO is 96 words), so it looks like 36 bytes waits in FIFO to be send.
