Setting up STM32F765 for dual boot operation.
I'm trying to set up our system for dual boot mode. I'm using AN4826 "STM32F7 Series Flash memory dual bank mode", AN2606 "STM32 microcontroller system memory boot mode", and sample program "STM32F769I_EVAL\Examples\FLASH\FLASH_DualBoot" as guides. I need some clarification on how to get this to work.
I am developing the program using Keil uVision 5.25.2.0. Using STMCubeProgrammer, I have nDBANK and nDBOOT unchecked. I have BOOT_ADD0 set to 0x80 (0x200000). I am using a SEGGER J-Trace PRO for flashing and debugging.
My intent is to execute from one bank and use the other bank for updates. On entry to my code, I will check the other bank to see if new code is present. If so, I want to change to booting into the other bank, invalidate the code in the current bank, and do a soft reboot. On reboot, I want to check if the other bank contains invalid code. If so, erase it to set up for future updates.
My current problem is that I always power up into the bootloader when trying to debug with j-Trace PRO.
First, I need some clarification from the documents.
- The boot flowchart has a decision box that states "If boot address is out of memory range or in ICP".
- What is the memory range?
- What is ICP?
- Another decision box states "If the code in boot address is valid"
- What constitutes "valid" code?
- Is the value in BOOT_ADD0 affected by the flash bank swap bit SWP_FB? That is, if BOOT_ADD0 = 0x80 (0x200000) and SWP_FB is 1, will the bootloader execute the code at 0x300000?
- And lastly, how do I debug my code using the SEGGER j-Trace PRO?
