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[Feedback] USB Setup buffer should be separated from PCD_HandleTypeDef structure

lconlcong
Associate II

 

Description

Currently, in the HAL USB driver, the PCD_HandleTypeDef structure embeds the setup packet buffer directly:

uint32_t Setup[12]; /*!< Setup packet buffer */

This design tightly couples the control structure (state, locks, callbacks) with a DMA-dependent buffer. As a result:

  • When USB OTG FS/HS DMA is enabled, the entire PCD_HandleTypeDef must be located in a DMA-accessible SRAM region.

  • This prevents developers from keeping the handle itself in faster memory (e.g. DTCM) while only placing the setup buffer in SRAM.

  • It reduces flexibility and forces a performance compromise.


Suggestion

The setup buffer should be separated from the handle:

  • PCD_HandleTypeDef should only store a pointer to the setup buffer.

  • The actual buffer can then be allocated by the user in a proper memory region (DMA-accessible SRAM).

For example:

uint32_t *Setup; /*!< Pointer to setup packet buffer */

This would make memory placement more flexible:

  • Developers can keep the handle in DTCM for fast CPU access.

  • Only the setup buffer needs to be placed in SRAM for DMA.


Current Workaround

The current workaround is to move the entire handle into SRAM, but this is suboptimal because most fields in the handle do not require DMA access.

 

2 REPLIES 2
FBL
ST Employee

Hi @lconlcong 

Thank you for your feedback.

First, FIFO memory is a dedicated memory, separate from system RAMs, accessible by OTG controller.

Second, SETUP token overhead is 8 bytes.  I need to check whether this extra space (4bytes) is reserved for buffer alignment. To be confirmed.

One more note, it is mentioned under section 2.4 USB OTG controller operating modes, in How to configure USB FIFO over USB OTG controller article, OTG_FS controller in STM32 MCUs cannot be configured in internal USB DMA mode.

I hope it's clear!

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.


Thank you for your reply.

I’m specifically referring to the USB_OTG_HS peripheral using the internal FS PHY on STM32H743II, where this behavior can be reproduced.
It is not related to the USBFS FIFO.

The Setup[12] field is a member of PCD_HandleTypeDef, which is generated by CubeMX as a global variable.
Under the default compiler settings, it is properly aligned, including the internal Setup member.

The main point of my suggestion is about memory layout flexibility:
currently, PCD_HandleTypeDef embeds

uint32_t Setup[12];

which forces the entire handle to reside in DMA-accessible SRAM when DMA is used.