ETHERNET LWIP - STM32F429i - DP83848 Initialization Stuck / Clock Suspected Issue

[Kirelof]

Hi everyone,

I am working on a custom board based on the STM32F429I MCU (RMII mode) and I am trying to integrate LwIP with a DP83848 PHY.

At the moment, I am unable to get Ethernet working. The issue appears during PHY initialization — the code blocks while trying to communicate with the PHY over MDIO.

Project Context

• MCU: STM32F429I

• PHY: DP83848 (RMII mode)

• Middleware: LwIP

• Development tool: STM32CubeIDE (project originally generated with CubeMX, but I cannot re-generate it now due to version mismatch)

• ETH driver: HAL

I have tried:

1. Using the LwIP stack with the HAL ETH driver

2. Attempting raw Ethernet (without LwIP)

In both cases, the system gets stuck during PHY initialization.

---

Observed Behavior

• The code freezes when accessing PHY registers (MDIO communication).

• When debugging, execution appears to stop when checking or configuring the ETH clock.

• The PHY does not respond to register reads.

---

Suspected Cause

I suspect either:

• The RMII clock (50 MHz reference clock) is not correctly generated or routed.

• The PHY hardware wiring may be incorrect.

• MDIO/MDC lines may not be functioning properly.

Since the failure occurs during clock/PHY access, I am leaning toward a hardware or clock configuration issue rather than a pure LwIP software problem.

---

Questions

1. Has anyone successfully integrated STM32F429I + DP83848 in RMII mode with LwIP?

2. Are there known pitfalls regarding:

   • RMII clock source configuration (MCO vs external oscillator)?

   • PHY address configuration?

   • Required CubeMX ETH clock settings?

3. Is there a recommended minimal test (without LwIP) to validate only MAC ↔ PHY communication?

---

Additional Information

If needed, I can provide:

• ETH clock configuration

• Schematic excerpt (RMII + PHY section)

• PHY address and strap configuration

• Debug register values

Any guidance on how to isolate whether this is a hardware or software issue would be greatly appreciated.

Thank you in advance.

[waclawek.jan · Accepted solution]

What is this, an AI-generated problem description?

> When debugging, execution appears to stop when checking or configuring the ETH clock.

> The PHY does not respond to register reads.

So which one is it, execution stops when checking ETH clock, or when configuring ETH clock, or when attempting to read PHY registers? Those are three very different things (and may be written in very different ways, where details do matter). What good is it to give a vague problem description?

> Any guidance on how to isolate whether this is a hardware or software issue would be greatly appreciated.

Start with checking if you do have valid 50MHz clock at ETH_RMII_REF_CLK (PA1) pin, using oscilloscope/logic analyzer.

JW

[Kirelof]

Hello hello,

It's my first time posting in a forum and I felt kinda insecure so I did pass my message through AI in a sad attempt to make it better.

So I've found that the reset happened because Hal_Delay.

In any case I checked the 50MHz clock and it's working allright and I also checked all the other pins for RMII mode and they're allright. Once I deleted all Hal_Delay/Hal_GetTick from the code it started working.

So i'm going to close this thread because it wasn't a fault of LwIP.

Thank you.