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Dynamic Allocation Issues with SDRAM

Umair
Associate II

Hi,

I'm working on a project using STM32H733 and Azure RTOS. I have written my own implementation of malloc and other memory allocation functions. I'm using the `tx_byte_pool_create` function to first create a byte pool in SDRAM and then using `tx_byte_allocate` in my custom malloc to allocate memory from the byte pool.

The byte pool is created successfully in SDRAM, and I can also see the contents of SDRAM. Everything seems to work fine.

Umair_0-1760679685655.png

I'm able to ping my device, etc. However, as soon as I trigger an API to hit an endpoint running on an HTTPS server, the device triggers the callback function. While preparing the response, it encounters one of the memcpy operations (where the HTTP server allocates memory and stores the buffer in SDRAM) and gets stuck in the Hard Fault Handler.

Umair_1-1760679875019.png

Work-Around: I replaced `json_asprintf` with `sprintf` and passed it with a memory block allocated in SDRAM using a custom malloc implementation. And it worked, I successfully got a response from the HTTPS server. Note: This workaround is effective for a limited number of API endpoints; however, for certain APIs, a memcpy issue still causes a Hardfault.

Umair_2-1760680331343.png

Other than this, the following are the MPU configs for the SDRAM I'm using;

MPU_InitStruct.Enable = MPU_REGION_ENABLE;
MPU_InitStruct.BaseAddress = 0xC0000000;
MPU_InitStruct.Size = MPU_REGION_SIZE_16MB;
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
MPU_InitStruct.Number = MPU_REGION_NUMBER3;
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
MPU_InitStruct.SubRegionDisable = 0x00;
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
HAL_MPU_ConfigRegion(&MPU_InitStruct);

I believe the SDRAM memory region should be Cacheable and Bufferable to achieve maximum performance. Ideally, it should be the configurations in row 4 of the following table.

Umair_3-1760680453337.png

But as soon as I made the SDRAM region Cacheable, the device went into the MemManage Fault Handler. This happens as soon as the CPU tries to execute a function that resides at address 0x49xxxxxx, which should be illegal, as this address falls in the Peripheral region.

Umair_4-1760681885019.png

 

Kind regards,
Umair Asghar

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