Can the NUCLEO-144 STM32F413ZH be configured for 16-Bit CRC

[mike_m]

I am using the Analog Devices EVAL-ADE9430 Evaluation board for testing one of their devices. The Evaluation board uses the NUCLEO-144 STM32F413ZH processor. I am using the Keil uVision development setup to run and debug code.  I am specifically concentrating on the SPI Bus Driver and the timing. I have no previous experience with STM Devices and how the SPI transfers happen in the processor. so I apologize a head of time. 

The Analog Devices ADE9430 uses a a 16-bit CRC (CRC-16-CCITT) and from what I originally read  the STM32F413ZH processor supports 32-Bit CRC (CRC-32-CCITT).  Diving deeper into the NUCLEO-144 STM32F413ZH processor manual section "29.4.2 CRC calculation" indicates "The SPI offers CRC8 or CRC16 calculation depending on the data format selected through the DFF bit." When the DFF bit (SPI_CR1 bit 11) is 0 it uses CRC8, when the DFF bit is '1' it uses CRC16.

• https://www.st.com/resource/en/reference_manual/rm0430-stm32f413423-advanced-armbased-32bit-mcus-stmicroelectronics.pdf

The software (afe_config.c) is currently initializing the Data size to 8 bits (DFF = 0). I am trying to determine if the STM32F413ZH processor can actually be configured to match the 16-bit CRC (CRC-16-CCITT) and handshaking used by the Analog devices ADE9430 device. The AD9430 has both 16-bit and 32 bit registers that can be access via the SPI bus. They look as follows

16-Bit SPI Read operation

MOSI ----  [16-bit command]  --- [xxxxxxxx] --- [xxxxxxxx]  --- [xxxxxxxxxxx]  From STM Processor

MISO ----  [xxxxxxxxxxxxxx]  --- [8 bit data] --- [8 bit data]  --- [16-bit CRC]   From ADE9430 

                                                                                                    |--- The ADE9430 calculates the final CRC

                                                                                                          across both 8 bit data transfer then sends 

                                                                                                          accumulated result.  

32-Bit SPI Read operation

MOSI ----  [16-bit command]  --- [xxxxxxxx] --- [xxxxxxxx]  --- [xxxxxxxx] --- [xxxxxxxx] -- [xxxxxxxxxxx]  STM Proc

MISO ----  [xxxxxxxxxxxxxx]  --- [8 bit data] --- [8 bit data]  --- [8 bit data] --- [8 bit data] -- [16-bit CRC]   ADE9430  

                                                                                     The ADE9430 calculates the final CRC

                                                                                      across all four 8 bit data transfer then sends 

                                                                                        accumulated result to the STM proc.

So the final 16 bit CRC will have to be calculated on both 16 bit and 32 bit data on the SPI Bus. The AD9430 calculates the CRC over the entire Read operation transmission 

I was thinking of setting the DFF = 1 (16-Bit transfers) so when I read a  32 bit register the SPI Bus uses two 16-bit transfers to retrieve the register contents. But I was concerned how the STM processor generates it CRC. Does it generate the CRC accumulative across all the data and CRC 16-Bit data transfers? Or does it generate it based on each 16-bit data received including the final CRC sent by the ADE9430?

After the data and CRC are transmitted by the ADE9430 the HAL_SPI_TransmitReceive() function appears to check for a CRC error using a SPI_FLAG_CRCERR (see below). I am wondering how the SPI_FLAG_CRCERR  is actually detected. it seems like it needs to accumulate the data across the entire SPI transmission and it should end up exclusive OR-ing it self to all zeros if the CRC is good... Otherwise its a CRC failure. 

Sorry if I was all over the place I am thinking this through as I was writing it.  I basically want to know if its even possible to get the STM processor to work with the ADE9430? I know there is a polynomial register that would also need ti determine how to select that value to load into the SPI polynomial register to match the ADE9430.... 

Thanks - mike

  /* Check if CRC error occurred */
  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
  {
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
    /* Clear CRC Flag */
    __HAL_SPI_CLEAR_CRCERRFLAG(hspi);

    errorcode = HAL_ERROR;
  }
#endif /* USE_SPI_CRC */