Does the STLINK-V3SET need back bias protection when unpowered?

[CFlac.1]

Specifically, when T_VCC is not supplied, what state are the pins in for the STLINK-V3SET? We are using the SWDIO, SWCLK, and JTAG pins on the STDC14 connector CN1.

[LauraCx · Accepted solution]

As the STLINK-V3SET is designed around the STM32F723 microcontroller, it will follow the STM32F723's embedded internal pull-ups and pull-downs on the JTAG input pins:

• NJTRST: Internal pull-up

• JTDI: Internal pull-up

• JTMS/SWDIO: Internal pull-up

• TCK/SWCLK: Internal pull-down