Hello everyone!
I’m developing a device that will include an NFC Tag, and I’ve chosen the ST25DV64KC. This Tag needs to be mounted on a case and communicate with the "mainboard" of my project via I²C. Therefore, I’m working on a small circuit that will allow the Tag to be placed on the case and connected to my main circuit (which features an ST microcontroller and additional components).
I’ve already designed the circuit for the ST25DV64KC, but now I need to develop the PCB antenna. For its dimensions, I’m referencing the application notes AN2972 and AN5605, and I’m also using your NFC Inductance tool: https://eds.st.com/antenna/#/.
Now, I have a few doubts:
The tool provides the antenna’s inductance value at 13.56 MHz based on the dimensions I input. However, I assume that to achieve resonance at this frequency, I need to introduce a capacitor between the two antenna electrodes (AN0 and AN1), calculated to make the LC circuit resonate at 13.56 MHz, correct?
Another doubt concerns placing the designed circuit in the center of the antenna. From the application note AN2972, I’ve noticed that it’s recommended to avoid having ground planes above or below the antenna or placing signal traces near the antenna. So, I’m wondering if there are any precautions I should take to implement this kind of design (antenna surrounding the circuit), or if it’s generally better to design the antenna separately from the rest of the circuit.
I’m asking this because I’ve noticed that some of your evaluation boards use a similar design, with the circuit entirely within the area enclosed by the antenna’s loops.
Thank you in advance for your time and support!
