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Watchdog timer errata for the uPSD32xx

joseph2399
Associate II
Posted on June 01, 2004 at 16:26

Watchdog timer errata for the uPSD32xx

1 REPLY 1
joseph2399
Associate II
Posted on May 17, 2011 at 12:01

The actual operation of the watchdog timer in uPSD32xx family of devices is different from what is documented in the current data sheets. The actual operation is as follows:

A) Writing a ''0'' to the WDRST register effectively disables the watchdog timer; however, the recommended way to disable the watchdog timer is to write 0x55 to the WDKEY register as stated in the data sheets.

B) The watchdog timer essentially counts down from the value written into the WDRST register (when enabled) rather than up.