Posted on June 28, 2006 at 13:14Hi all,
We use the STR711 dev. board, and the BSPI0.
The interrupt source is: Receive Fifo Not Empty: RFNE
Fifos are enabled, depth is 7.
We output a char (and nothing is connected to it, the device is free of anything) on the SPI bus, and we trigger the interrupt.
How is that possible? We send stuff (1 byte), and the interrupt is serviced as we got something back; but nothing is on!
Is there any internal connection forcing the sampling on MISO each time the clock is produced to output on MOSI?
Thanks for any input!
Best regards,
Tech
