I am using the STEVAL-MKI238A kit with the LIS2DUX12 chip. This is connected to an NRF52840DK and interfaced using Zephyr's lis2dux12 driver. The eval kit is connected to the SPI3 device using its default settings. I am running an SPI clock of 1Mhz and the VDD and VDIO pins are supplied 1.85V+GND from a shared power supply with the nrf52840dk. The Zephyr lis2dux12 driver is hard coded to use SPI mode 3, so CPOL+CPHA.
The lis2dux12 driver fails its INIT sequence by mismatch of the WHO_AM_I readback. The device seemingly returns 0x0C.
I have connected a logic analyzer to the pins of the eval kit shows this sequence:
- 0x01 is written to register 0x3E to wake the device up from sleep
- Once the CS signal is disabled, 50ms passes before the next CS enable to allow the sensor to wake up
- A read request is made to register 0x8F (bit 7 read + 0x0F)
- The clock idles for 48.5µs before pulsing for the response
- The sensor effectively pulses 0000.1100b
- However the sensor seems to attempt to set a bit after the second clock falling edge that falls short of the minimum high level voltage of 0.7xVDD, which dies out before the clock rising edge where the master reads the line.
I have studied the datasheet, but am running out of ideas on why this is happening. Just to note, I have also attempted:
- Another STEVAL-MKI238A
- VDD and VDIO of 2.55V and 3.30V
- Supplying VDD/VDIO/GND from NRF52840DK header
- 125kHz, 500kHz, 1MHz, 5MHz, 10Mhz SPI frequencies
- SPI2 device on nrf
- Different pin mappings than default
- Disconnecting the SDA line from the eval kit does not affect the reading on the logic analyzer so interference from the nrf dk MISO pin is unlikely
Any of the attempts listed returns the exact same result (but the SDA voltage ≃ VDIO, expect the small initial ~0.5V pulse which is the same regardless of VDD/VDIO).
Any help will be greatly appreciated.
