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I3C interfacing of LSM6DSOX

tDwaraka
Associate

I'm working on LSM6DSOX with our custom ARM Cortex M4 core with I3C master.

I have few doubts as follow

  1. Does LSM6DSOX retain the Dynamic slave address after ENTDAA procedure? I'm unable to assign another dynamic address after initial assignment is done.
  2. SDR mode of LSM6DSOX supports upto 12.5MHz? I'm seeing a variable clock frequency on I3C bus as attached for SETDASA process. will this be a problem? I'm not getting ACK for the assigned Dynamic address when Static address is provided

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