I’m using BALF-SPI2-02D3 with the S2-LP at 433 MHz and have a question about Figure 13 in the datasheet.
The recommended PCB stackup shows:
- Top plane: 35 µm + 31 µm
- Mid layer: 31 µm
- Bottom plane: 35 µm + 31 µm
What exactly does “35 µm + 31 µm” mean for the outer layers?
Is this:
- base copper + plated copper,
- finished copper thickness in ST’s stackup notation,
- or something else?
I’m trying to choose a 1.0 mm, 4-layer PCB stackup from a commercial manufacturer and would like to match the recommendation as closely as possible.
Thanks for any clarification.
