cancel
Showing results for 
Search instead for 
Did you mean: 

Clocking SPC570

david tomsa
Associate III
Posted on August 11, 2017 at 07:17

Hi,

i have a Problem with the Clock Configuration of the SPC570 �C (SPC570S-DISP). I just want to use the External Clock (crystal).

my Configuration:

CGM_SC_DC0/

CGM_SC_DC1/

CGM_SC_DC2 are set to 0x80000000

AC0_SC/AC1_SC/AC2_SC/AC3_SC are set to 0x01000000

My Problem is, i divide the SPI Clock with:

AC0_DC3 = 0x80310000

According to the Reference Manual, the Spi Clock should be 400kHz (40Mhz Crystal / 50 / 2), but it's 200kHz. 

Could anyone tell me where my issue could be ?

#spc570sx #dspi
This discussion has been locked for participation. If you have a question, please start a new topic in order to ask your question
1 ACCEPTED SOLUTION

Accepted Solutions
Posted on August 21, 2017 at 11:53

Hello David ,

aips_clk1 is not the good clock.

  • apis_clk is the frequency to access the register not the periph

you have to take periph clock

   

         Best regards

                     Erwan

View solution in original post

3 REPLIES 3
Erwan YVIN
ST Employee
Posted on August 11, 2017 at 10:17

Hello David ,

AC0_SC/AC1_SC/AC2_SC/AC3_SC is well set to external crystal simulator

the SPI clock should be 

(40Mhz Crystal / 50) = 800kHz

Maybe i have missed something.

Did you check your CTAR configuration ?

Anyway, i am going to check with DSPI experts in Autosar team .

0690X00000607pPQAQ.png

      Best regards

                         Erwan

david tomsa
Associate III
Posted on August 11, 2017 at 11:36

Thanks for your fast answer.

RM0349 Page 473 (Figure 160) say, that the Clock aips_clk1 is divided with 2. 400kHz should be correct. 

BR, PBR and DBR are set to 0. 

Posted on August 21, 2017 at 11:53

Hello David ,

aips_clk1 is not the good clock.

  • apis_clk is the frequency to access the register not the periph

you have to take periph clock

   

         Best regards

                     Erwan