Dear all,
I am using STW81200 as a PLL LO signal generator. I have designed my own PCB strictly following the reccomendations and reference design of evaluation kit. Currently I am trying to perform SPI communication between host FPGA and my PLL circuit, but I am having some problems receiving any return signal on MISO SPI line. I am performing a read operation trying to receive the chip ID stated as in the datasheet but I am receiving nothing. I have soldered two different chips and both behave the same so I elimited the risk of poor soldering. I have attached also STM32l152c board to perform SPI reading but withouth any success so I am eliminating the risk of FPGA code and configuration problem. Each PLL consumes approximately 50 mA. I measured power supply pins voltage and I get 5V and 2.5V on correct pins. As both circuits behave in simillair way I have a feeling that the issue has to do something with my circuit or something that I am missing. I am attaching a schematics bellow and also a oscilloscope measurement of SCK and MOSI lines on photo 1 and SCK and MISO lines on photo 2. CS line stays low for all the time of transmitting/receiving of 32bits/4bytes. SCK signal doesn't look very good, but it shouldn't be a problem.
Can anyone help me? I would appreciate any help as soon as possible.
I couldn't find the correct forum label. Apologies for posting in two forums but I didn't notice the correct label.
Many thanks,
Vasja
