The STA369BWS datasheet offers little to no description of configuration register C addr 0x02.
It references a FFX power output mode and has 4 modes but offers no explanation of how these four modes function.
00: drop compensation
01: discrete output stage: tapered compensation
10: full-power mode
11: variable drop compensation
This clearly plays into CSZ0~3 bits that are only described as FFX compensating pulse size register.
Is there any description of these registers anywhere, or how they work?
I am designing a product that is having a PSU droop issue, and the ODM recommendation was to adjust this register, but I have no idea what it does or how it works. For what it is worth I am pushing for the HW solution. . .
