I have a concern about using the TSX3704 due to a possible power-up glitch. The scenario is something like this:
Each input will be driven prior to the application of power to the IC's VCC. The inputs will have series resistance on the order of 100kOhm to keep any appreciable current from flowing in the input's ESD diodes prior to VCC activation. This will cause both inputs to be approximately equal (VCC - ESD voltage drop) until VCC is great enough, at which time the ESD diodes stop conducting.
In my application, VCC begins to rise about 5msec after the inputs are active, and rises from 0 to 12V in ~1msec. The voltage driving the inverting terminal through a series resistor is a 2V reference and there is no appreciable capacitance at the inverting terminal. Therefore, the inverting terminal will track VCC as it rises until VCC is greater than ~1.4V (2V - ESD diode drop). The voltage driving the non-inverting terminal is 2.2V, again through a series resistor. Similarly, as VCC rises so will the voltage at the non-inverting terminal. However, there is capacitance to ground shunting the non-inverting input, causing it to slew much slower than the voltage at the inverting terminal.
Now for my questions:
- Due to the ESD conduction, both inputs will be for all intents and purposes equal, but only until VCC passes ~1.4V. Is it safe to assume the output of the comparator is high impedance during this interval?
- When VCC reaches 2.7V, the datasheet minimum for operation, the inverting terminal will still be greater than the non-inverting by a few 100mV due to the RC time constant present at the non-inverting input. This should cause the output of the comparator to be low until the RC delayed signal at the non-inverting terminal passes 2.2V. This is the desired behavior. Can I expect this? I don't want the output to glitch to the wrong state on turn-on.
