STM32 MPUs Products and hardware related

Hi , i am using the stm32mp157DAC processor , where in custom board i added the emmc with SDMMC2, in my hardware there is 3 bootpin, boot0 boot1 boot2 .i did changes in u-boot DTSi did changes in Linux DTS  only in u-boot DTS i added this line in SDMMC2.&sdmmc2 {pinctrl-names = "default", "opendrain", "sleep";pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;non-removable;no-sd;no-sdio;st,neg-edge;bus-width = <8>;vmmc-supply = <&v3v3>;vqmmc-supply = <&vdd>;mmc-ddr-3_3v;status = "okay";};---------------Pinctrl pinmux---------------------------------------------sdmmc2_b4_pins_a: sdmmc2-b4-0 {pins1 {pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */<STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */<STM32_PINMUX('B', 4, AF9)&g

 Hi,I'm trying to implement external inference models on the STM32MP257-DK for an object detection project. Currently, I'm using the base project provided by ST in the SDK and modifying a few files, such as:stai_mpu_object_detection.ccssd_mobilenet_pp.hppTwo generic implementation files for the YOLOv8n modelThe base structure remains mostly the same, with only the model being switched by updating the reference in stai_mpu_object_detection.cc — choosing between SSD MobileNet and YOLOv8n.After creating this “generic” module, I cross-compiled and transferred the binaries to the board. When selecting SSD MobileNet, everything works perfectly. However, when switching to YOLOv8n, no successful inference occurs.Does anyone have any documentation or guidance on how to implement external models on this board? I also implemented a debug printer that logs the total number of inferences. Here's what I get: SSD Mobilenetraw detections: 1idx = 0 class = 1 score = 0.969(

Hello,I'm debugging a user space application for stm32mp257f-ev1 (Core A35) using cubeIDE 1.17.0. After launching application debug the SFRs tab is empty. In project properties I can't find CMSIS-SVD Settings as for an M33 project for the same board.How can I change project's configuration to get peripheral's registers values in SFRs?Marco 

Hi,I'm encountering an issue during the optimization process using Edge Cloud AI. Sometimes, even when using the same model architecture but with different file sizes, the optimization results vary significantly. In some cases, especially with smaller models, the NPU on the STM32MP257-DK is barely utilized (as shown in the benchmark below). Paradoxically, I’ve observed worse optimization performance with lighter models.In the images below, I show an example: from left to right, the models progressively increase in resolution, yet the optimization results behave inconsistently. Any suggestions on how to address this? TINY_YOLO_V2_192_INT8.TFLITE: Inference time: 87.52 msGPU: 95.85%NPU: 4.15% TINY_YOLO_V2_224_INT8.TFLITE: Inference time: 5.920 msGPU: 3.54%NPU: 96.46% TINY_YOLO_V2_416_INT8.TFLITE: Inference time: 12.13 msGPU: 4.50%NPU: 95.50%   

Hello ST Team,We are planning to use the STM32MP2 series MPU in one of our design. We have found the below link for the validated DRAM with the STM32MP2 processor. We want to know other than that is there any other DRAM is validated with the STM32MP2 Processor?Reference Link:https://wiki.st.com/stm32mpu/wiki/Validated_DRAM_on_STM32_MPU_portfolio#STM32MP2-RegardsParth  

Hello, We recently bought an STM32MP257f-dk board. We are running OpenSTLinux on it. We would like to connect a modem to communicate with the board via 4G. We're thinking of using a USB modem.Do you have a list of recommended modems or modems natively compatible with OpenSTLinux? Or are there any specific features to look for? If Linux drivers exist for a modem, will it be easily compatible with OpenSTLinux?Thank youGuillaume

Hi,I am developing Linux/RTOS for STM32MP257F-EV1 with a slight twist.The STM32MP257F has two A35 cores (Core-0 and Core-1), a M33 Sub-core (Core-3) and a Cortex- M0+.By default Linux uses A35 Core0 and Core-1(both cores). I want to run Linux on A35 Core0 and RTOS on A35 Core-1.To achieve this I am setting [nr_cpus=1] in the Kernel command.This option forces the Kernel to use only Core-0 for execution.Since Linux uses SDRAM for execution, I am loading my RTOS in SRAM via a debugger.But the moment the contents of SDRAM are changed, there is an exception/abort on Linux and the following message is displayed:------------------------------------------------------------------------------------E/TC:0E/TC:0 Core data-abort at address 0x7a480050E/TC:0 esr 0x96000210 ttbr0 0x8213b000 ttbr1 0x00000000 cidr 0x0E/TC:0 cpu #0 cpsr 0x800003c4E/TC:0 x0 0000000000000000 x1 0000000000000000E/TC:0 x2 0000000000008080 x3 0000000000002020E/TC:0 x4 00000000dededede x5 00000000ababababE/TC:0 x6 00000000abab

Dear STMicroelectronics Support Team,I am working with the STM32MP257F-DK board and using OpenSTLinux. In my setup, I am only using the Cortex-A35 (MPU) without any firmware running on the Cortex-M33 (MCU). I am trying to enable USB OTG functionality using the USB3.0 DRD port via the USB Type-C connector (CN15).My goal is to enable dual-role OTG behavior (host/device) using only the A35 core and Linux kernel. I would like to ask:1. How can I properly enable and configure the USB OTG mode using the USB3.0 DRD port in this configuration?2. Is it possible to manually switch between host, device, and OTG modes through the Linux kernel (e.g., via sysfs or configfs interfaces)?3. Do I need to load any additional drivers, userspace daemons (such as usb-role-switch), or enable MCU firmware to support role switching?4. Is automatic role detection via the Type-C controller supported purely in A35/Linux setup, or is MCU firmware required? The device tree includes usb-role-switch and a u

Hello STMicroelectronics Community:I would like to ask how to burn the system without using STM32CubeProgrammer. My chip is stm32mp135-AAE3. Thanks,Ivy7

My board (STM32MP135D) useTIM2 to count the external clock.PE15 cannot work properly, but PA15 works normally. // ok tim2_pins_mx: tim2_mx-0 { pins { pinmux = <STM32_PINMUX('A', 15, AF1)>; /* TIM2_ETR */ }; };  // not work tim2_pins_mx: tim2_mx-0 { pins { pinmux = <STM32_PINMUX('E', 15, AF1)>; /* TIM2_ETR */ }; }; 

Hello STM32 Community,I’m currently working with the STM32MP135D-FK (Boyard) board and trying to build a Weston image using a custom machine configuration. I’m following the official guide: :link: https://wiki.stmicroelectronics.cn/stm32mpu/wiki/How_to_create_your_own_machine. After compiling with the STM32 starter package, I successfully generated the required folders and files. However, when I attempted to generate my custom image using CubeMX device tree, I encountered an issue. The generated build doesn’t contain the expected folders and files, and I received the following warning: WARNING: st-image-weston-1.0-r0 do_create_flashlayout_config: >>> Cannot generate FlashLayout_board.tsv file: the arm-trusted-firmware/tf-a-stm32mp135f-studyproject1-mx-opteemin-program/fsbl_boot.bin is missing in the deploy folderCould anyone assist in resolving this issue or provide guidance on how to properly include the necessary files for my custom image generation?Thank you in ad

Dear STMicroelectronics Support Team,I am currently working with the STM32MP257F-EV1 evaluation board and have encountered a discrepancy in the user manual (UM3359, Rev 2, October 2024) concerning the GPIO mapping of the USER2 button.In Table 8 of the manual, the USER2 button (B4) is listed as connected to PA13. However, Table 32 correctly indicates that the USER2 button is connected to PG8, which aligns with the board's schematic and my practical observations. Pressing the USER2 button triggers the expected behavior associated with PG8, while PA13 does not respond as described.This inconsistency could potentially lead to confusion for developers referencing the manual. I kindly request that this discrepancy be reviewed and corrected in future revisions of the documentation.Thank you for your attention to this matter.Best regards,Adnanps: I could not find anyway to send a correction request to any emails, so here it is for everyone to know in advance.

Hi,I've lost the power brick for my STM32MP15X-EVAL board. It's a 5v-3a barrel connector, but I don't know the polarity and it's not written on the board or anywhere.Does anyone know where I can find a replacement, or the exact spec of the power brick so that I can find another one ?

Platform Details:Board: STM32MP257-dk and STM32MP257-ev1 seriesOS: Linux (Debian-based, provided by STM)Architecture: ARM64.NET Version: .NET SDK 8.0.407 (linux-arm64)SCADA System: Rapid SCADA (runs as a systemd service)Description:I'm trying to run a .NET 8-based SCADA application (ScadaAgentWkr.dll) on my STM32MP2 embedded Linux system. However, the application crashes when launched via systemd. Here’s what I’ve done and the issues I’m facing:What I Tried:Installed .NET SDK 8.0.407 for linux-arm64 from Microsoft.Installed libicu packages:libicudata74 libicuuc74 Configured systemd service at /etc/systemd/system/scadaagent6.service.Added environment variables to support ICU: Environment=DOTNET_SYSTEM_GLOBALIZATION_INVARIANT=1 Environment=LD_LIBRARY_PATH=/usr/lib/aarch64-linux-gnu Also tried using a wrapper script to export these before calling dotnet.Error Logs:From systemctl status scadaagent6.service: Main PID: XXXX (code=dumped, signal=ABRT) Failed to start Rapid SCADA Age

We are following the steps mentioned in this link How to measure the DDR throughput - stm32mpu.However , stm32_ddr_pmu.py is not found anywhere Please point us to stm32_ddr_pmu.py.

Could you please clarify the pinctrl_z assignment in the device tree?The thing is, OP-TEE panics in shared_resources.c:142 <get_gpioz_nbpin> when I don't define in the device tree something like this:&pinctrl_z { st,package = <STM32MP_PKG_AC>; gpioz: gpio@54004000 { status = "okay"; ngpios = <8>; gpio-ranges = <&pinctrl_z 0 400 8>; };};Even though this is an assignment for AC package, and not the AB I have.

I am working with openSTLinux as below:- oe-manifest: TAG openstlinux-6.6-yocto-scarthgap-mpu-v25.03.19- Hardware: STM32MP257F-DK- Image: st-image-weston- Secure boot is enable and device is closed (BSEC_STATE_SEC_CLOSED)- Remove Debug Support in Linux Device tree as KYAO suggested in this topic I ran command xtest. The command is provides by a recipe optee-test_4.0.bb in meta-st-openstlinux. I found that many test cases are failed. They are related to pcks11. I attached the log file while running xtest.28179 subtests of which 33 failed 134 test cases of which 29 failed 0 test cases were skipped TEE test application done!Is there any problem with OPTEE OS? Please help me solve the problem or give suggestions to solve this problem.  

Moved from the MCUs section - STM32MP157F is an MPU (as the title says!)Hello!I'm building battery powered device and considering STM32MP157F.Looking at the mainline upstream linux kernel(https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git)I don't see device tree for this board, only for stm32mp157c (stm32mp157c-dk2.dts)Can you please tell what's the status of upstreaming support for STM32MP157F, maybe there is some process already. If yes, can you send me links to LKML patches?I've also checked device trees difference between C and F in your repo and it looks pretty much the same, will it work if I just copy paste the device tree from https://github.com/STMicroelectronics/linux/blob/v6.6-stm32mp/arch/arm/boot/dts/st/stm32mp157f-dk2.dts to mainline kernel and run it on STM32MP157F. Or some additional patches are required?Best regards!

Hi,in schematic of the STM32MP257-DK-board, I found the following resistors at the Ethernet interface being marked with "DNF":When looking at the board, these resistors are missing (which should be "DNP" in this case?).From my understanding of the wiring of the Ethernet interface, they should be there, but as one can see, the ETH-port on that DK-board is working properly also without them.So my question: what is the story behind these resistors which should be there and are missing while everything is working properly? Is there some other hack which makes these resistors obsolete/which replaces these resistors?Thanks! 

Hello,I use STM32MP1 SoC. According to wiki I can interrupt uploading images with STM32 Cube Programmer via USB-DFU: For USB boot, you can easily interrupt this command stm32prog usb 0by pressing Ctr + C in the console without U-Boot modification. U-boot also prints in its console "Ctrl+C to exit", but in fact I cannot send "Ctrl+C".  It looks like U-boot console is read-only while uploading via USB-DFU.  What is wrong ?At normal boot (from eMMC), I can interrupt U-boot loading and use console perfectly.  I use minicom for U-boot console

I have a custom yocto project based on stm32mp157c. I have developed the bootloader and linux kernel.I have display functionalty and display is working perfectly. But now I am changing the display, because the display will be discontinued. The device tree setup for the display is:&dsi { #address-cells = <1>; #size-cells = <0>; status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dsi_in: endpoint { remote-endpoint = <&ltdc_out_dsi>; }; }; port@1 { reg = <1>; dsi_out: endpoint { remote-endpoint = <&dsi_panel_in>; }; }; }; panel-dsi@0 { compatible = "orisetech,otm8009a"; reg = <0>; rotation = <0>; address_mode = <0>; power-supply = <&v3v3>; status = "okay"; port { dsi_panel_in: endpoint { remote-endpoint = <&dsi_out>; }; }; }; };This configuration is working perfectly fine. As this display will be discontinued, we decided f

I have created a button in qt when I click on the button it has to create a pdf and also display the pdf.i am developing an application where i have to store the user data in pdf called report and later view it please give me the steps on how to perform this and any examples related to it 

I am working with openSTLinux as below:- oe-manifest: TAG openstlinux-6.6-yocto-scarthgap-mpu-v25.03.19- Hardware: STM32MP257F-DK- Image: st-image-westonWhen the system starts up I see some error messages like this:Starting kernel ... I/TC: Secondary CPU 1 initializing I/TC: Secondary CPU 1 switching to normal world boot I/TC: Reserved shared memory is disabled I/TC: Dynamic shared memory is enabled I/TC: Normal World virtualization support is disabled I/TC: Asynchronous notifications are enabled [ 0.000000] [SCMI] channel: Cmd [740 (0x14:0x7)] returned error (-8) [ 0.000000] [SCMI] channel: Cmd [741 (0x14:0x7)] returned error (-8) [ 0.000000] [SCMI] channel: Cmd [742 (0x14:0x7)] returned error (-8) [ 0.000000] [SCMI] channel: Cmd [743 (0x14:0x7)] returned error (-8) [ 0.000000] [SCMI] channel: Cmd [744 (0x14:0x7)] returned error (-8) [ 0.000000] [SCMI] channel: Cmd [745 (0x14:0x7)] returned error (-8) [ 0.000000] [SCMI] channel: Cmd [746 (0x14:0x7)] returned error (-8) [ 0.000000] [S

Hi ST Community,I’m working with the STM32MP135D-FK (Boyard) board and trying to build a Weston image using a custom machine configuration, following this official guide::link:https://wiki.stmicroelectronics.cn/stm32mpu/wiki/How_to_create_your_own_machineI’m using OpenSTLinux (scarthgap) and everything builds fine, but I get this warning during the final step:WARNING: st-image-weston-1.0-r0 do_create_flashlayout_config: >>> Cannot generate FlashLayout_board.tsv file: the arm-trusted-firmware/tf-a-stm32mp135f-studyproject1-mx-opteemin-program/fsbl_boot.bin is missing in deploy folderIt says fsbl_boot.bin is missing and so the FlashLayout_board.tsv file can’t be created. The build itself completes successfully otherwise.     My questions:How can I fix this issue and generate the missing fsbl_boot.bin?Do I need to enable or configure something extra in trusted-firmware-a or optee-os?Is there anything

Hi all.I am confused about how I am supposed to provide power to the STM32MP257F-DK as it seems I am not providing enough power to the board when connecting the board to my PC via the STLINK/Power connector as the red Power LED is on and the Green LED that is meant to be on when the board is powered up is off.I am using a USB 3.0 port from my PC, I was able to successfully power the board to use the DFU function with an PD USB prower brick pluged into STLINK/Power while I had a USB cable connected from my PC to the USB DRD port.How am i ment to power this board when using STLINK for serial use when I cant plug in a PD power brick at the same time as use STLINK ?