STM32 MPUs Products and hardware related

sed: can't read /home/letter/new-development/build-openstlinuxweston-stm32mp1/tmp-glibc/work/x86_64-linux/ncurses-native/6.1+20180630-r0/sysroot-destdir/home/letter/new-development/build-openstlinuxweston-stm32mp1/tmp-glibc/work/x86_64-linux/ncurses-native/6.1+20180630-r0/recipe-sysroot-native/usr/lib/pkgconfig/*.pc: No such file or directoryAnyone know the fix for this? A google search has gotten me nowhere. I tried upgrading the openembedded layer to their latest, no help.Running on Ubuntu 18.04.3 LTS, all the recommended packages, all is up to date. Following the instructions at https://wiki.st.com/stm32mpu/wiki/STM32MP1_Distribution_PackageI have a year of experience with Yocto (on another SOC) and 25 years with embedded Linux.

STM32MP157-dk1, UART, file to open, fingerprint sensor

Hello, I trying to make the example in: https://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP157C-DK2/Develop_on_Arm%C2%AE_Cortex%C2%AE-M4/Modify,_rebuild_and_reload_a_firmwarebut after SSH password window (here i put root in password) I get another window (attached), I don't know what pass i need to put, root don't work. (192.168.1.6 is my board ip).Thanks.

Hi, I used the below link for building OpenSTLinux Distribution.https://wiki.st.com/stm32mpu/wiki/STM32MP1_Distribution_Package As mentioned in the step 7 "Flashing the built image", there should be a /deploy/image folder for images. But i didn't find any image folder inside deploy directory.What could be the possible reason thet image folder is not generated?How should I compile to get the image folder?Thanks,Deshvir

I would like to understand what the Eclipse IDE is doing to start the debugger, so that I can move away from using it. I much prefer CMake and other tools. I'd be grateful for any assistance. The wiki section for this is TBD.I'm not too familiar with OpenOCD, but have run the command: $OECORE_NATIVE_SYSROOT/usr/bin/openocd -s $OECORE_NATIVE_SYSROOT/usr/share/scripts -f board/stm32mp15x_dk2.cfgThis seems to work so, moving on to GDB: $OECORE_NATIVE_SYSROOT/usr/bin/arm-openstlinux_weston-linux-gnueabi/arm-openstlinux_weston-linux-gnueabi-gdb firmware.elfAnd this is where I come unstuck. I've used GDB a bit, but don't know the magic incantations to install an image into the M4 on this platform.(gdb) target remote localhost:3333Remote debugging using localhost:33330x00000000 in g_pfnVectors ()I get a "target not yet examined" error which I don't understand. The vector table is all zeroes, so nothing has yet been placed in the RAM yet. (gdb) loadLoading section .isr_vector, size 0x298

Hi,As i was testing the limit of how many virtual uarts i can create, i found that the limit is actually 4:Using debug tracing i can see that the channels get created inside the code (here i am creating 5 virtual uart) but only 4 ttyRPMSG are created.I reduced the total buffer used by each channel to 256 instead of 512:// File: rpmsg_virtio.h   /* Configurable parameters */ #ifndef RPMSG_BUFFER_SIZE #define RPMSG_BUFFER_SIZE (256) #endifSo in theory, i should be able to create 8 channels but the max is 4 apparently.Can someone please confirm how they made it?Thanks

Good evening,since NAND flash can be addressed pagewise only (I guess STM32 flash is NAND) and I am able to write for e.g. a single byte to the page, will the whole page gets erased during every write operation? My presumption is that the page gets buffered somewhere, gets fully erased and the buffer containing the new data will be written back to it. But this would mean that the flash wear would be extremly high. Would be great if someone has an answer and a reference to some kind of document. I couldn't find any.Thanks alot!

Hi,I am using the STM32MP157C-DK2 and so far i manged to make FREERTOS work flawlessly with OpenAMP and the tracing printf functions. I can insert breakpoint at any point without a problem. However, i start having issues when i declare a semaphore or a mutex in the function MX_FREERTOS_Init().Here is my main.c file:/** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ #include "main.h" #include "cmsis_os.h" #include "ipcc.h" #include "openamp.h" #include "gpio.h"   /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ #include "stm32mp15xx_disco.h" #include "log.h"   /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); voi

Hi,I am following the tutorial of developing on M4 with the STM32MP1 but when I do the"debug as" to this project, it comes out an error.The STM32MP1 has connected to my PC through the STLINK usb; the boot0 and boot2 on the board have been set to "on"; and no another Console view.I could not find out the problem.Any suggestion would be a great help.Thanks.Duncan

There's some inconsistency on the support of LPDDR2/3 on LFBGA448/LFBGA354 package. Page 16 of the datasheet lists that LPDDR is only supported on TFBGA257/361, which is consistent with the settings in CubeMX (LFBG* packages have on LPDDR option).However, page 10 & 11 of AN5122 STM32MP1 Series DDR memory routing guidelines clearly show that LPDDR is supported on both LFBGA packages. I guess this is an error in the datasheet and CubeMX?

I'm trying to build an image for the STM32MP157C-DK2 board using the standard unmodified OpenSTLinux yocto build.The build is successful and the image boots fine, but Bluetooth does not work with the basic image (it works with the trusted image).Using a scope, I noticed that BT_REG_ON (on TP29) is driven low, which turns off the bluetooth part of the chip.I suspect that the device tree is parsed differently depending on the bootloader used (the device tree itself is identical to the one that is preloaded on the provided SDCard).Build Configuration: BB_VERSION = "1.40.0" BUILD_SYS = "x86_64-linux" NATIVELSBSTRING = "ubuntu-19.04" TARGET_SYS = "arm-openstlinux_weston-linux-gnueabi" MACHINE = "stm32mp1" DISTRO = "openstlinux-weston" DISTRO_VERSION = "2.6-snapshot-20190726" TUNE_FEATURES = "arm armv7ve vfp thumb neon vfpv4 callconvention-hard cortexa7" TARGET_FPU = "hard" DISTRO_CODENAME = "thud" ACCEPT_EULA_stm32mp1 = "1" GCCVERSION = "8.%" PREFERRED_PROVIDER_virtual/kernel = "linux-stm32

Hi, I trying to compile the OpenAMP_TTY_echo example, but I get these a lot of errors, attach a file.

Hi,We are currently using the STM32MP1 DK2 board for our project.We have to use FreeRTOS + UART7 and USART3 with DMA Our issue arise when FreeRTOS is used with an UART (USART3 or UART7 in our case) which use the DMA.We have reduced the project to the minimal configuration :- The linux image on the A7 is the one provided by ST and is flashed with STM32CubProgrammer.- The project is generated from CubeMX (started from the DK2 board with the peripheral enabled and FreeRTOS with a single UART (7 or 3 in our case) using DMA).- The CubeMX generated device-tree is compiled and used by the kernel.When executing, the issue appears after the first call of __HAL_DMA_DISABLE() in the function HAL_DMA_Init() in file stm32mp1xx_hal_dma.c(MX_UART7_Init() -> HAL_UART_Init() -> HAL_UART_MspInit() -> HAL_DMA_Init())After the final instruction of (__HANDLE__)->Instance)->CR &= ~DMA_SxCR_EN is executed, the content of the current stack is modified and the previous stacked return ad

I am programming a STM32MP157C-DK2 board using System Workbench. I have been able to run the OpenAMP_TTY_echo example project without trouble. Then I created a new project and generated OpenAMP middleware from CubeMX. No trouble while compiling and uploading the firmware. But I have been able to test the firmware because of this error (see image below).Am I missing something? Please share any hint that could help!Thanks,Tristan

Hi,I would like to compile with the GNU toolchain directly on the device, without the use of cross-compilation. it's possible?In which way can i do that?

Hi,I've been following the guide over at:https://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP157C-DK2/Let%27s_start/Execute_basic_commandsI'm using a Windows 10 as a host, but I was hoping I'm not the only one. I don't have access to a Linux environment at the moment.I'm at the point where I need to connect to the device using the UART/ST-Link, power on, and press reset on the device to see an output on the terminal.My setup is:Host is Windows 10Terminal is called Termite 3.4 (no install version)DK2 is powered from a dedicated USB power (500mA source)DK2 boots up fine (the display works and the demo environment seems to work ok)Serial settings I have as follows: COM3 9600 bps, 8N1, No Handshake8 bits, no parity, 1 stop bit, no flow controlThe output in the terminal, after pressing reset, is all jumbled and garbage:[00] TÙ@¾"#V�Šÿ£[1B][18]Äã[12][07]€Åÿ‹3[15]"[03]ª�¢AÄ&KûÇÊ[0B]K[13]ÿ[05]˜C[13]àÕC BQpZ•®§#�qS‚[03]�?ƒˆJ##B¥[05]í½ÇõOEüc½½[08][1A]0Aáqú[07]¨ú[08]F[17]

Hi, I can't to connect my board by ethernet connector, when I connect the cable both leds are always off. I try using ifconfig to set a ip but my board doesn't respond to ping request, but when I used ifconfig to set ip over usb0 my board respond to ping and I can copy the hello_world example.Is my ethernet interface damaged? or I need to do other configuration?

Trying to create a simple application that will toggle LD9 in Engineering Mode but get an error with the OpenOCD.Output on console window is as follows:Open On-Chip Debugger 0.10.0+dev-01124-gbfb41e6 (2018-11-16-15:23) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html debug_level: 1 cortex_a interrupt mask on cortex_a interrupt mask on cortex_a domain access control fixup on cortex_a domain access control fixup on 3333 none separate adapter speed: 5000 kHz adapter_nsrst_assert_width: 200 adapter_nsrst_delay: 200 none srst_pulls_trst srst_only srst_pulls_trst srst_gates_jtag srst_open_drain connect_deassert_srst Error: Could not find MEM-AP to control the core ap 0 selected, csw 0x10006000 Error: Target not examined yetundefined debug reason 7 - target needs reset Error: Target not examined yet Error: Could not find MEM-AP to control the core&nb

Hi,I'm currently figuring out about the new ANA0 / ANA1 pins.As far as I understand, those pins are always connected to the ADC so that I don't need to touch the GPIO registers in order to use those pins. Is my understanding correct?Also I can connect those pin to PA0 / PA1 using ANAx_SEL bits in SYSCFG_PMCR register. In this case is it possible to short or damage the circuit/chip when I set different signal between ANAx and PAx?Thanks a lot!

Hello,i have a problem when tring to establish a ethernet connection with the STM32MP157-DK2 board.Windows 10 -64bit system, no firewall, no antivirus. DHCP enabled.Tried with cross & straight CAT6 ethernet cable.I cannot establish a SSH connection with the board trough putty on port 22.The yellow LED from the ethernet connector is blinking, the GREN led is off.In the board "netdata perf monitor" i have no ethernet connection.I wonder what i am missing here?Here is the ifconfigroot@stm32mp1:~# ifconfig eth0 Link encap:Ethernet HWaddr 00:80:E1:42:55:EF inet6 addr: fe80::280:e1ff:fe42:55ef/64 Scope:Link UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:66 errors:0 dropped:0 overruns:0 frame:0 TX packets:48 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:9472 (9.2 KiB) TX bytes:8923 (8.7 KiB) Interrupt:60 Base address:0x8000   lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1/128 Scope:Host UP LOOPBAC

I have a STM32MP157C-DK2, and I'm interested in better understanding how the IPCC peripheral works. I've tried out the OpenAMP echo example and trawled through its code, and the associated HAL code. I have generally completely avoided the HAL for microcontroller projects - I prefer to write my own bare metal drivers in C++.IPCC seems like a very simple peripheral, but I am slightly confused by the implementation in HAL (and the Linux driver appears to do the same thing). When checking the RX/occupied status of a channel, both implementations read the SR register of the "other" processor. That is, the M4 uses the registers in IPCC_C2 to communicate, and the A7 uses IPCC_C1. But the M4 uses IPCC_C1->SR in HAL_IPCC_RX_IRQHandler(). What is the relationship between the two SR registers? It seems like in principle that they should have the same values, except maybe when transitioning. My understanding is that if the A7 sets a channel bit using SCR, the M4 gets an RX/occupied interrupt; i

Hi,I'm currently working on porting Arduino Core for STM32 to STM32MP1 Cortex M4 core.Here are some stuff I found:Typo: I post it in the Github: https://github.com/STMicroelectronics/STM32CubeMP1/pull/1Possible bugs in HAL driver: stm32mp1xx_hal_conf_template.h includes some modules and definitions that STM32CubeMP1 doesn't actually have, such as "stm32mp1xx_hal_eth.h", "stm32mp1xx_hal_rtc.h", "stm32mp1xx_hal_smartcard.h", HAL_ETH_MODULE_ENABLED....etc. I'm not sure if it is a bug or something intentional.The Section 4.1 "STM32 product cross-compatibility" in AN5253 "Migrating from STM32F469/479 line to STM32MP151, STM32MP153 and STM32MP157 lines" has some misleading contents. Specifically, it describes as if the Cortex M4 core supports OTGFS, OTGHS, and RTC (probably more) but the STM32Cube package does not actually support those peripherals. Does this mean that it is planned to support those, or the AN is misleading?Thank you.

Hi, it looks like the Cortex M4 core in SMP32MP1 doesn't have flash memory or something like eeprom that can be used as non-volatile memory. Is there any "best practices" to give non-volatile data to the Cortex M4?

Hi,i am trying to understand where and how are RETRAM, MCUSRAM, virtio ring buffer descriptors and virtio buffers allocated. In the next link:https://wiki.st.com/stm32mpu/wiki/Linux_remoteproc_framework_overviewIt is described the device tree configurations for these reserved-memories. These device tree nodes are read by the st_remoteproc.c driver within the st_rproc_parse_fw function. Inside st_rproc_parse_fw memory regions are registered calling rproc_mem_entry_init and rproc_of_resm_mem_entry_init which are declared in remoteproc_core.c.My question is where these memories and buffers are allocated? Which functions are used to allocated them? dma_alloc_coherent() function for example does not look the right function as we have fixed physical addresses that need to be mapped to share specific memories between MPU and MCU.Thanks

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