STM32 MPUs

Hi ST, How i can I use M33 co-processor of stm32mp257 series , and how can i connected debug with Cubeide,how can i use Ethernet port  through the Co-processor,Note: I am using Opnestlinux distribution package.

I've got an STM32MP135AAE3 for which I'm writing my own FSBL.  It's basically working!There are two scenarios:1) Chip set to serial boot; the BootROM wakes up and I use STM32_Programmer_CLI.exe to send it my FSBL which it stores in SYSRAM, BootROM then passes execution to my FSBL2) Chip set to boot from eMMC; BootROM wakes up, sees my FSBL in eMMC, copies it from eMMC to SYSRAM, passes execution to itIt would be helpful for my FSBL to know which scenario it is, and according to STM32 MPU ROM code overview I should be able to inspect the first 512 bytes SRAM2 for a bunch of boot information as defined in this H file.  It also says SRAM2 is for "ROM code secure data" and SRAM1 is for "ROM code non-secure data" and I'm running in non-secure mode so maybe it's actually SRAM1 for me?In any case, I've got my LD file set up so nobody touches the first 512 bytes of either SRAM1 or SRAM2:MEMORY { SYSRAM (rwx) : ORIGIN = 0x2FFE0000, LENGTH = 128K SRAM1 (rwx) : ORIGIN = 0x3

Hello,unlike the STM32MP157F-DK2 the STM32MP257F-DK is not equipped with an Touch/LCD.Is it possible to use an identical/similar LCD with the STM32MP257F-DK (that means: are the appropriate connections on the board)?Marc

Heyho, until now I have only used the STM32 MCUs, from L01x, to G4,  up to H7 (single core), always bare-metal. We're now thinking about scaling up to some MPU, for more processing power, and also for some faster interfaces (mainly gigabit ethernet). From my first investigations about the MPUs, I'm not sure if we can "afford" this on the personnel side, due to the complexity and very probably the necessity to use an OS (real-time is a must, at least "real" enough for multi-channel low latency audio). We have an overworked software department, and no "embedded SW" people, and I'm more of a hardware designer who can do some basic C stuff. So I'd like to know: which OSs are mostly used on the MPUs, or which are you using how's your experience with these what's the learning curve for newbees anybody working bare-metal with the MPUs, and how's that Thanks in advance!

Linux kernel, Yocto project, etc. each has their LTS strategy, does ST has similar plan for its OpenSTLinux?

I have a STM32MP257F custom board with a MT53E1G32D2FW-046 WT:C (4GB) memory.But when I'm booting the TF-A, then I get this message. Notice that this processor passes the DDR data(stm32mp_ddr_test_data_bus(void)) and DDR rw(stm32mp_ddr_test_rw_access(void)) test! So I don't think that the assembly was bad.ERROR: DDR addr bus test: can't access memory @ 0x100000000 BACKTRACE: START: stm32mp2_ddr_setupThis means that my CPU cannot access the address 0x100000000. This limit is exactly 4GB.If we looking at the code. That means that the offset variable must be 0x80000000, which is 2GB. The function stm32mp_ddr_test_addr_bus(size_t size) is beging called with size = 4294967296 = 4GB.uintptr_t stm32mp_ddr_test_addr_bus(size_t size) { size_t addressmask = size - 1U; size_t offset; size_t testoffset = 0U; /* Write the default pattern at each of the power-of-two offsets. */ for (offset = sizeof(u_register_t); (offset & addressmask) != 0

I am working on STM32MP157F-EV1 and would like your assistance in enabling SPI-NAND support within the OpenSTLinux (Yocto) environment.Overview:Development Board: STM32MP157F-EV1Storage Target: SPI-NAND (Serial NAND)Flash Part Number: GD5F4GM8UEYJGR (GigaDevice, 4 Gbit)Operating System: OpenSTLinux / Yocto-based BSPBoot Objective: Generate a complete bootable image for SPI-NAND (TF-A, U-Boot, Kernel, and RootFS)Currently, the official OpenSTLinux images support eMMC, SD card, NOR, and parallel NAND. However, our design requires SPI-NAND as the primary non-volatile memory. We would like to build and flash the image to SPI-NAND and eventually boot directly from it.Support Requested:Image Generation:How to configure Yocto (OpenSTLinux) to build an image for SPI-NAND on STM32MP157F-EV1?

Hello,I am working on the stm32mp257f-ev1 board and attempting to switch from the default USART2 early crash console output to USART6. I've successfully switch TF-A and U-BOOT console to USART6 but my OP-TEE console continuously outputs on USART2.I've made sure to change the serial0 alias from USART2 to USART6 in the OP-TEE device tree (as I've successfully done in the TF-A device tree) and I've also followed the directions to change the header file stm32mp2_def.h For USART6, I've changed the early crash console in stm32mp2_def.h to the following:#define STM32MP_DEBUG_USART_BASE                    USART6_BASE#define DEBUG_UART_TX_GPIO_BANK_ADDRESS    GPIOF_BASE#define DEBUG_UART_TX_GPIO_BANK_CLK_REG     RCC_GPIOFCFGR#define DEBUG_UART_TX_GPIO_BANK_CLK_EN        RCC_GPIOxCFGR_GPIOxEN#define DEBUG_UART_TX_GPIO_PORT                     

Hi,I am trying to understand and test secure boot on STM32MP1. I was able to compile and boot unsigned tf-a. boot failed as expected as it is not verified.generated keys.Now how to burn these below hash file? can we burn into flash and test without using OTP for development and POC?publicKeyhash.binThank you.

Hi,I am trying to enable secure boot in STM32mp157f-ev1 board. I am using the Developer Package source code provided by ST. I am using this command to generate the tf-a.stm32:make E=0 -f ../Makefile.sdk.stm32mp1 TF_A_DEVICETREE=stm32mp157f-ev1 TF_A_CONFIG="optee-sdcard optee-programmer-usb" TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 ROT_KEY=<path>/privatekey.pem ROT_KEY_PWD=<password> KEY_ALG=ecdsa MBEDTLS_DIR=<path>/mbedtls-3.4.1 DYN_DISABLE_AUTH=0 DEPLOYDIR=$FIP_DEPLOYDIR_ROOT/arm-trusted-firmware stm32But I am getting an error:LD SOURCES-stm32mp-openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11/stm32mp-openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11/sources/ostl-linux/tf-a-stm32mp-v2.10.13-stm32mp-r2-r0/tf-a-stm32mp-v2.10.13-stm32mp-r2/../build/optee-sdcard-stm32mp157f-ev1/bl2/bl2.elfarm-ostl-linux-gnueabi-ld.bfd: SOURCES-stm32mp-openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11/stm32mp-openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11/sources/ostl-linux/tf-a-stm32mp-v2.10.13-stm32mp-r

  Hello Team,I am currently working on QuadSPI with MDMA, but I am unable to locate the driver code for this functionality.Could you please provide the required driver code?For reference, I am working on the STM32MP133F series.Regards,Sreedhar Kaduru  

Hello,Is there a list of supported/recommended displays that are compatible with the DSI connector CN4 on STM32MP157D-DK1 please?Kind regards,Al  

I am porting Linux to a board that uses the STM32MP255F.I used the BSP from the STM32MP257F-DK board.For now, I was able to get the LCD panel to display, but the weston-graphical-session did not start.When I added the following line to /etc/default/weston, the weston-graphical-session started:OPTARGS=--use-pixmanThe demo menu appears, and I can launch the demos.However, the GPU demos do not run.As I understand it, the OPTARGS=--use-pixman setting is meant for when there is no GPU.Since the GPU demos also do not run, it seems that the GPU is not operating.Under what conditions does the GPU fail to operate?For reference, the Device Tree gpu section is configured as follows:&gpu {contiguous-area = <&gpu_reserved>;status = "okay";};Another thing I am concerned about is that the initialization around usb3dr does not match the custom board, so I have disabled it.&m33_rproc {mboxes = <&ipcc1 0x100>, <&ipcc1 0x101>, <&ipcc1 2>;mbox-names = "vq0",

I've got a custom board with an STM32MP135AAE3 talking to an eMMC (THGBMTG5D1LBAIL if it makes a difference). I've discovered that if I write from SYSTEM to the eMMC using DMA (HAL_MMC_WriteBlocks_DMA) it works fine, but if I use anything in RAM (SRAM1, SRAM2, or SRAM3) as the source, the DMA fails immediately.If it helps, the SDMMC2 registers inside SDMMC2_IRQHandler() are: STA=0x8001010; DCOUNT=0x200; DCTRL=0x90; IDMACTRL=0x1; MASK=0x11AIs this a known limitation of the IDMA? If not, is it something I'm somehow initializing incorrectly?

In the STM32MP257F-DK Linux BSP, I believe that the initialization of the USB3DR peripheral devices (TCPP03-M20, CC1_EN, CC2_EN) is performed by the M33 core executing the following program:/usr/local/Cube-M33-examples/STM32MP257F-DK/Demonstrations/USBPD_DRP_UCSI/lib/firmware/USBPD_DRP_UCSI_CM33_NonSecure_stripped.elfWhere can I find the source code of this program?I have created a board using the STM32MP255F with a configuration similar to the STM32MP257F-DK board.The hardware configuration around USB3 is the same, but some pinctrl and I2C bus channels are different.Therefore, I would like to modify and use USBPD_DRP_UCSI_CM33_NonSecure_stripped.elf.

Hi,We are trying to make use of the ethernet interface in this fashion:- The board is a custom one with a soldered module from Karo, the qsmp-2550, that includes an stm32mp255fa.- The eth2 is connected to a PHY (TI DP83869HM) in RGMII.- The PHY is then configured to output Base100-FX to an SFP cage.- There is no CLK125, we use ck_ker_eth2 configured at 125Mhz (confirmed in /sys/kernel/debug/clk/stm32_clk_summary), we use the `st,ext-phyclk` DT property.The PHY is reachable via mdio using the CLI from mdio-tools and seem to be working as intended.We checked that the PHY sends the correct clock, the RX one, with a scope: it does.Then when enabling the link using `ip link set up eth0` we are greeted with:```root@qsmp-2550:~# ip link set up eth0[ 16.583371] stm32-dwmac 482d0000.eth2 eth0: Register MEM_TYPE_PAGE_POOL RxQ-0[ 16.586971] stm32-dwmac 482d0000.eth2 eth0: Register MEM_TYPE_PAGE_POOL RxQ-1[ 17.123948] stm32-dwmac 482d0000.eth2 eth0: PHY [stmmac-1:00] driver [TI DP83869] (irq=

I have built a custom board by using STM32MP257F and I want to boot on USART6. I have not succeed to boot on USART6 when I compile my own fsbla by change the device tree of TF-A.I got a suggestion from ST Dev team to run this ROM tracedump wiki-stm32mp-addons/MP2RomTracesDump at 6.1.0 · STMicroelectronics/wiki-stm32mp-addons · GitHub and it gave me a positive output on USART6. The soldering was OK. The BootROM was OK and the UART6 was alive. This is the output from my USART6.=================================================== == STM32MP25 cut2.x bootrom display traces V1.01 == == Date of compilation : Jun 26 2024 - 11:25:23 == =================================================== Executed on Cortex A35 - Aarch64 Successfully booted on interface SD instance 1 Reset reason : POR reset Chip state : CLOSED_UNLOCKED ================================================================== Bootrom traces ================================================================== [INFO] -

I am trying to build the OpenSTDroid kernel, I first acquired the "STM32MPU Distribution Package for Android", Then as mentioned in https://wiki.st.com/stm32mpu/wiki/How_to_build_kernel_for_Android, I loaded the kernel & Then tried to build the dtb binaries using:build_kernel dtbAnd got the following error:$ build_kernel dtb[1/1]: Generate dtb binariesERROR: Not possible to generate the kernel imageAfter commenting out the &>${redirect_out} part where make is generating the dtb files, I get the following output:$ build_kernel dtb[1/1]: Generate dtb binariesmake[1]: *** No rule to make target 'dtbs'. Stop.make: *** [Makefile:256: __sub-make] Error 2ERROR: Not possible to generate the kernel image

I have used HSEM on STM32H7 very well.Recently，I test the HSEM of STM32MP257 in development mode， by JTAG/SWD，I can lock the semaphore by reading the HSEM_RLRx register via CPU1~3, but after power reset，when I write the HSEM_RLRx register to lock or unlock semaphore, it doesn't work!the security /privilege / CID filtering of HSEM are all off after reset, and the cpu3 could  access the HSEM_RLRx register correctly，but after cpu1/2  write the HSEM_RLRx register or HSEM_CnIER，both lock and unlock operations have no effect.pls give me some suggestions to check what I might have done wrong .thanks!

Hello, I am working with an STM32MP135f-dk device running Linux and trying to evaluate the possibility of using the USART peripheral in synchronous mode (TX/RX + CK). From a hardware point of view, the STM32 USART clearly supports synchronous operation. However, when using the standard STM32 USART Linux kernel driver, the peripheral is only exposed as a /dev/ttySTM* device and operates strictly in asynchronous (UART) mode. As far as I can see, the current driver does not enable or drive the CK clock signal, which makes true synchronous USART communication impossible under Linux, even though the underlying hardware is a USART. My questions are:1. Is this limitation expected by design in the current STM32 Linux USART driver? 2. Has anyone successfully implemented synchronous USART on STM32 under Linux, for example by: Extendimg the existing driver, writing a custom kernel driver, or using an alternative ?

I opened a PR on https://github.com/STMicroelectronics/u-boot.git for a patch that is applicable only downstream, and since I did not receive any response, I contacted Patrice Chotard, who told me to contact you for submitting downstream patches.In addition to U-Boot, I have patches to submit to:https://github.com/STMicroelectronics/linux.githttps://github.com/STMicroelectronics/meta-st-openstlinux.githttps://github.com/STMicroelectronics/meta-st-stm32mpCould you please guide me on how I should proceed?Thanks and regards,Dario

Recently，I test STM32MP2 with STM32MP257F-EV1 board.I want to debug A35 core with STLINKV3 that on the STM32MP257F-EV1 board，does it support ?And which cores are the STLINK-V3EC can support,except cortex M.

Hi everyone, I am trying to bring up the DP83867 with RGMII on the STM32MP131DAG7. However I am getting the following error:[ 18.253959] stm32-dwmac 5800a000.ethernet end0: renamed from eth0 [ 23.695184] stm32-dwmac 5800a000.ethernet end0: Register MEM_TYPE_PAGE_POOL RxQ-0 [ 23.756147] stm32-dwmac 5800a000.ethernet end0: PHY [stmmac-0:00] driver [TI DP83867] (irq=POLL) [ 24.764629] stm32-dwmac 5800a000.ethernet: Failed to reset the dma [ 24.769435] stm32-dwmac 5800a000.ethernet end0: stmmac_hw_setup: DMA engine initialization failed [ 24.808705] stm32-dwmac 5800a000.ethernet end0: __stmmac_open: Hw setup failed I saw this is typically due to the 125MHz clock not being generated. In our schematic, we have the CLK_OUT from phy going to ETH_RGMII_CLK125. I noticed the phy was not generating a clock so using the "mii" tool in U-Boot, I tried to generate the clock by updating the 0x0170 register: Link I was unable to get any clock to generate even though the 25MHz clock

Dear All,I have a total of 8 boards with eMMC from Alliance Memory. All of them boot from SDCard and work well. On 4 of them eMMC is detected correctly and boots fine with 50Mhz/8bit/ddr speed.4 boards are failing in exactly the same manner, that is:  EXTCSD/CID registers have some wrong values and eMMC is discovered as 128MB (instead of ~4GB), with with wrong manuf. ID and manufacturer code. Writing gives io-error (timeout) - reading returns "ER18" ascii code every 512bytes.I have lowered down params of sdmmc interface down to: 400kHz / 1 bit / no-ddr, with different slew-rates on IO ports without a success. I've observed these changes on an oscilloscope and also with simple logic analyzer on lower speeds/1bit bus. Failure is persistent between restarts and also between boards. I have also manipulated series resistors and pull-up resistors.Normally I'd expect some layout issues, but this failure mode is really stable and I am looking for other ideas. I can't imagine tha

Please check STM32MP157F-DK2 no function issue after STM32MP157F-DK2.#1. After receiving the STM32MP157F-DK2 board, I connected a 5V/3A Type-C Power Adapter to CN6 and verified Linux boot and operation. LCD operation.#2. Updated the Linux image on the SD card using STM32Cube Programmer on a Windows PC.Following the procedure in the link below, successfully updated the Linux flash image to the SD card using FlashLayout_sdcard_stm32mp157f-dk2-optee.tsv via STM32Cube Programmer on the Windows PC.https://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP157x-DK2/Let%27s_start/Populate_the_target_and_boot_the_image#3. Turn SW1 BOOT0 and BOOT2 back ON, connect the USB Cable to the ST-LINK (CN11) on the PC, and connect the 5V/3A Type-C Power Adapter to CN6 to boot the stm32mp157f-dk2 board.#4. UART logs output normally, but the message "ERROR USB TYPE-C connection in unattached mode" appears and Linux does not boot. - The same Type-C Power Adapter used in #1 above was