STM32 MCUs

HI all,I have a custom board composed by an stm32h743 and 2 QSPI memory (2x 16MB) with different CS. The proejct uses only the first memory to access the graphic contents and doesn't use the second memory.For this reason, I want to use the second memory to store new text and graphic contentsIs it possible to share the external QSPI memory with another task to write data on QSPI while touchgfx is running?Is it possible to stop Touchgfx_task for the time I need to read or write into the second memory?There is a more elegant way to do it? thanks 

Hello!This function was defined and used instead of memset to reset mbedtls's sha256 context. Is there a good reason behind this choice?https://github.com/STMicroelectronics/STM32CubeH7/blob/master/Middlewares/Third_Party/mbedTLS/library/templates/hash_stm32.c  /* Implementation that should never be optimized out by the compiler */ void hash_zeroize( void *v, size_t n ) { volatile unsigned char *p = (unsigned char *)v; while (n--) { *p++ = 0; } } 

Hi All,  Does anyone know how to enable the MCO2(PC9) output after secure manager enabled? its work in project without secure manager and it could be enabled in systemClock config function as below:  ,but it's not work any more after secure manager on,and we could not call system clock config any more(the demo in repository v1.5.0 are calling).Summarize:1.How to enable MCO2 output in non-secure application;2. It seems after trustzone enabled, rcc would not work in non-secure side, is the demo on repository right or not(call system clock config)? Thanks!  

I have TouchGFX UI running on STM32H7. Only with one screen there is an issue, fonts gets distorted.   What could be the reason for this?  

Hello,I'm trying to figure out the max. reliable clock frequency for NOR flash connected via SPI or QSPI interface.I've read here or here  that there are custom board and evaluation board designs which are reading data at single transfer rate up to 120MHz.I wonder how this is possible regarding the timing parameters in the data sheet.For example, the MICRON MT25QL flash, which is equipped on some ST evaluation boards e.g. STM32H750_DK and STM32H753_EVAL, puts data at falling clock to IO after 5-6ns as shown here (tCLQV).In SPI or QSPI SDR mode the H75x latches data at rising edge which must be valid at least 2ns. Same for QSPI SDRTiming parameters seem to use the middle of the clock edge for reference. At higher frequency the rise and fall time of clock and IO lines must therefore be added to the timing calculation.I checked the clock and IO signals on various boards at different GPIO and flash drive strength and series resistors and measured min. 2ns rise/fall

I have a multi-language graphics project which requires the use of characters beyond the standard ASCII set.  I have not found a working method to convert C++ wstring to TouchGFX::Unicode.  I have attempted the following: Unicode::strncpy(txtTitleBuffer, headerText.c_str(), buf_size1);  //No matching funtions...Unicode::strncpy(txtTitleBuffer, headerText, buf_size1);             //No matching funtions... Unicode::snprintf(txtTitleBuffer, buf_size1, "%s", headerText.c_str());       //Compiles without error but only shows 1st character.Unicode::snprintf(txtPasswordTitleBuffer, buf_size1, "%s", headerText);  //Compiles without error but only shows ??? which is the default undefined font character. If possible I would like to stay with the standard C++ type for the strings and convert as it is about to be displayed as manipulating TouchGFX::Unicode is a bit clunky.

I've written a flash-based bootloader for the STM32F4 using the latest STM32CubeMX tool and its HAL libraries. I've avoided all the usual pitfalls (it's not my first bootloader), and my code works reliably. I'm not erasing my bootloader segment, writing to the wrong address, or failing to account for the instruction pipeline stall that a flash write causes. So far, so good. However, one problem I encountered was that on power-up, BEFORE any flash operations were done, I would generally find that the flash alignment and parallelism error flags were set. Moreover, during the course of writing a 200K byte image to flash in small chunks, I randomly encounter these error flags after successfully writing data to the last byte in a 256-byte page (this happens at various places in mid-sector, not at the sector boundary). Specifically, the call to HAL_FLASH_Program() to write a byte at a 256-byte boundary fails because the PGP and PGS flags got set after the end of the last (verified

I purchased the STM32WB5MM-DK and it has an application running. When I update CUBE-MX with the patch for STM23WB5MM , there are is no examples that match the application. The training talks about the example projects but they did not come with the update. Where can I find the source project for the Dev Boards application?  I work in MKS toolset 

Hello,I use a STM32WLE5JCI6 MCU. Sometimes I need a good clock precision so I switch to HSE as SYSCLK, with a 32MHz quartz. I use 4MHz as HCLK, and I chose to set HSEPRE=2 and HPRE=4. When I call SystemCoreClockUpdate() function the SystemCoreClock value is 8MHz, because HSEPRE value is not considered. Is it a bug or this is the expected value, for any reason I missed? The function HAL_RCC_GetSysClockFreq() uses LL_RCC_HSE_IsEnabledDiv2 to return the expected value, so the SystemCoreClock value is 4MHz if I configure the HSE as sysclock at startup.Thanks,Sylvain My code:void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); /** Initializes the CPU, AHB and APB buses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState

Hi,I am trying to send encrypted data between a C# application and STM32 in AES GCM mode.Currently, I am only doing encryption of a known test vector.Key and IV are both all zeros.AAD length is 0.My testvector is: 00 00 00 00 00 01 00 00 00 00 00 00 00 00 42 49Using the code below, I get the same ciphertext in both applications:03 88 DA CE 60 B7 A3 92 F3 28 C2 B9 71 B2 BC 31 But the tag never matches.I suspect there is something wrong in the final stage, where the tag is calculated.void AesTest() { uint8 iv[12]; uint8 plainText[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x42, 0x49 }; uint8 header[0]; uint8 cipherText[sizeof(plainText)]; uint8 authTag[16]; memset(iv, 0, sizeof(iv)); uart_printf("ENCRYPT\r\n"); if (!AesEncryptGcm(iv, header, sizeof(header), plainText, sizeof(plainText), cipherText, authTag)) return; } bool AesEncryptGcm(const uint8 *iv, const uint8 *header, uint8 headerLen, const uint8 *plainText, uint16

Hi,Could you please share the phase response of the Reshape Filter? The reference manual only provides the magnitude response, as shown belowRegards.

I'm working on RTC smooth digital calibration on an STM32U575 board using the HAL function HAL_RTCEx_SetSmoothCalib(). I'm using the LSE (32.768kHz) as the RTC clock source.What I'm trying to do:I want to adjust a known RTC drift (e.g., 500ms) over time using the RTC’s smooth calibration feature. I understand that I can configure the calibration window to 32s, 16s, or 8s using the SmoothCalibPeriod parameter, and that I can add or subtract pulses (each approx 30.5µs) to speed up or slow down the RTC.What I expected:With a 32s window, each call to HAL_RTCEx_SetSmoothCalib() can adjust ~15.6ms max (512 pulses × 30.5µs). So, it should take about 1024s (500 / 15.6 = 32 calls every 32s) to fully adjust 500ms. With a 16s window, I expected the correction rate to double, since the same pulse change should now apply over a shorter time, and thus the 500ms adjustment should take ~512s (500/15.6 = 32 calls every 16s).What I’m observing:When I call the function with RTC_SMOOTHCALIB

I see STM32F413VHT6 is a1.5Mb device from the ordering information and the memory mapping in the datasheet. I follow the same procedure I followed to program the range 800 0000 to 810 0000 for the rest of the 0.5 Mb (810 0000 to 817 FFFF) also , but i see the device is not getting programmed. Is there any other way to program this region (810 0000 to 817 FFFF) . Does this follow any other procedure , please help with this.

Hello,according to this document https://www.st.com/resource/en/application_note/an5337-guidelines-for-estimating-stm32h7-mcus-lifetime-stmicroelectronics.pdfthe expected lifetime of a STM32H7 mcu depends on the parameters Tj (junction temperature), VOS0, VOS1, VOS2, VCore and operation ratio.How can we determine VOS0, VOS1, VOS2 and VCore for the STM32H7S78-DK board? Thanks in advance,rk_iot 

Doing a short search, I did not find a board that conveniently fits my criteria for some future projects.These criteria are the following :  -  small form factor (not bigger than a Rasperry Pico, preferably smaller (Seed XIAO);  -  MCU preferably ranging from C0, F0...F3, F40x, L0 or L1; (not an exclusive list)  -  reasonable commercial availability in Europe;I intend to use these board as a kind of sensor extension for Linux SBCs, with the Raspberry Pi Zero (II) as favourite. Thus the Pi Zero / Pi Pico format as upper size limit.I can't specify more IO details yet, but the average peripherals of above mentioned MCU variants suffices for most purposes. But at least 8 or more IO lines should be available. Peak performance and low-power capabilities are not a criterium either.If someone here knows such a board, I would welcome any suggestion.Thanks !

Hello, I've been using the Nucleo-U385RG-Q for my project and all features work fine, but when I switch the code to a STM32U385VGT6Q, there is a problem when attempting to write to FLASH. My Write function starts with: if (HAL_FLASHEx_Erase(&flashErase, &error) != HAL_OK) { break; } and it precisely crashes at: FLASH_WaitForLastOperation in error = ((*reg_sr) & FLASH_FLAG_SR_ERRORS); with error code 128 (0x80). Searching for the error leads me to believe that the CPU is attempting to write protected/secure state areas but the Option Bytes says otherwise.I use Nima-LTD-I-CUBE-EE library.

I'm using the NUCLEO-U575ZI-Q board with the PWR_ModeSelection example, and I'm measuring the current consumption with an ammeter through the JP5 (IDD) connector.The current I measure in the different low power modes is always around 4.52 mA, which does not match the values stated in the datasheet.I'm probably making a configuration mistake. To use the example, I followed the README included in the SDK.As toolchain, I'm using CMake and VSCode as the IDE.Where am I going wrong?

Hi, I started from the LoRaWAN_End_Node example to develop a custom application with a STM32WL5MOC module. I would like to modify the example such that I can wake up the MCU from stop2 mode when I received some data on the lpuart . I set LSE as clock for LPUART1. I found some example on the community but they didn't for on my STM32WL5MOC. Someone can explain how to setup the LPUART?Thanks.Matteo

Hi everyone,We’re currently developing an OBD reader using an STM32G473, which includes three FDCAN controllers. Each FDCAN interface is connected to a TCAN3413 transceiver.As part of our testing setup, we built an ECU simulator using an Arduino with an MCP2515 controller and a TJA1050 transceiver, and this simulator works perfectly.However, we’re facing a major issue when trying to send CAN requests from our STM32-based board to this ECU simulator. We’re not able to make the FDCAN controller operate in Classical CAN 2.0 mode and send messages correctly.We verified this by checking both the RX and CAN lines of the transceiver with an oscilloscope. The TX signal from the STM32 does not show the expected data pattern.That said, the transceiver itself is working correctly, when we send data from the Arduino node, the RX pin on the transceiver shows a clean, valid CAN signal. The issue seems to be that the STM32’s FDCAN controller doesn’t properly interpret or transmit standard CAN 2.0 fra

Hi everyone, I'm a student who was assigned to make an ESP32 NodeMCU WiFi CP2102communicate with the magnificent STM32h755zqi board via usart, simply I wanted to start by writing a simplesentence on the terminal (I know how to use putty) to actually realize that I'm using it correctly usartcommunication.also reading on the forum and from the schematics, usart3 is recommended to do these things asyou can use virtual COM.I attach my file directly, there is certainly something wrong since I am a beginner, for nowon putty it prints indecipherable Chinese characters, I state that I am reading at the same baud rateand all the various configurations that I have entered.During the course I was told to use the M4 core but I was told to write a part of code on M7 to startonly the M4 (in the boot sequence) but I don't know what that meant at all so I wrote the code directly on M7,if anyone can help me in this aspect too, I'd appreciate it.PS: I also accept any other link that I can view for a tut

Hi,I am using a NUCLEO-G071RB development board. I accidentally erased the original bootloader while flashing a custom one. Is it possible to reflash or restore the built-in bootloader on the NUCLEO-G071RB development board? If so, where can I obtain the original bootloader file? Thanks,Aiswarya

Hello, during my tests I have come across a strange issue. During the initializing phase, my application was hitting a WWDG reset (after ~400ms) constantly. This only happened after a couple resets (toggling the NRST pin LOW).  I have concluded during debugging, that when this repeated resetting of the WWDG state occured, it is because the program is hanging on the autogenerated (via STM32CubeIDE) init function:   HAL_UART_Init(&huart2)   Looking further, it actually finishes most of the function code but hangs on the last function:   return (UART_CheckIdleState(huart));   It specifically hangs when doing the below check:   if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)   What baffles me, is how this is not repeatable behaviour. Most of the times I restart the MCU, it proceeds as intentioned. But sometimes it starts doing this infinite game of checking TEACK so long that WWDG resets it.

Hi,has anybody already implemented the LAN9253 via SPI?I´m trying since several month to implement the Software framework - without success...EtherCAT Software Framework User's Guide (microchip.com) Best regards, Achim

I am having issues when writing a buffer that is declared in the external buffer to an SD card. When I tried to download a bulk file (1.5MB), write failure (f_write returns FR_DISK_ERR) would happen at least once during the download process, but if I declared the buffer in the internal RAM, I didn't have the problem.    Example of my linker: /* Memories definition */MEMORY{RAM (rw) : ORIGIN = 0x20000000, LENGTH = 499K /*512K*/FLASH (rx) : ORIGIN = 0x8008000, LENGTH = 2048K - 0x8000SDRAM (rw) : ORIGIN = 0xC0000000, LENGTH = 16MMemory_B1 (rw) : ORIGIN = 0x2007C000, LENGTH = 0xA0Memory_B2 (rw) : ORIGIN = 0x2007C0A0, LENGTH = 0xA0QUADSPI (rw) : ORIGIN = 0x90000000, LENGTH = 16M}.....buff_sec (NOLOAD) :{. = ABSOLUTE(0xC0144100);*(.buff_Section)} > SDRAM//code example - buffer definitions__attribute__((aligned(4))) static FILE_SYS_BUFFER _bulkdwldBuff __attribute__((section(".buff_Section")));If I remove "__attribute__((section(".buff_Section")))" from t

Hi thereI am working on a custom board with a s2-lp radio on it. The only difference to the STM generate s2-lp SubGhz project is that I use PA5 for radio_sck (see attached Project). After playing a while with my I-NUCLEO-S2868A2 shields suddenly the basic minimal p2p example does not work anymore. When I press the button is pressed I see a call to app_x-cube-subg2:c:Set_KeyStatus and the a packet is send in app_x-cube-subg2:c:MX_SUBG2_P2P_Process->AppliSendBuff(&xTxFrame, xTxFrame.DataLen);. However the software stays forever in app_x-cube-subg2:c:MX_SUBG2_P2P_Process in the SM_STATE_WAIT_FOR_TX_DONE e.g. I get no Interrupt from the Radio in the P2PInterruptHandler where  the xTxDoneFlag should set. You can check in the attached Project that the Interrupt should be triggered by the falling edge, Spi clock is 625kBps, I use 8 bit words for the bus. The explanation I have killed my radio, but this must be impossible!!!!