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Hi  Supporters:    I used the St25r3911b IC to design NFC Module. Then, the new module could work.    However, the waves at the Antenna side are not well, please check the picture at the end.    I think maybe the matching circuit parameters do not match antenna? Please help me, thanks! 

I have been trying to see how fast can I toggle the pins on STM32H7 MCU. I'm using a nucleo-H723zg board. the clock configs are at the highest (550Mhz for CPU, 275 for APB and AHB), the pins are configured as very high speed. But still with a simple while loop such as  while (1) {GPIOE->BSRR = (uint32_t) GPIO_PIN_2;GPIOE->BSRR = (uint32_t) GPIO_PIN_2 << 16U;}the frequency of the PWM I see on the oscilloscope is 7.3 MHz max. Ofcourse the PWM is not the final goalbut I wanted to see how fast this mcu can implemnet the bit toggling.Am I doing something wrong here? 

Hi All,I can not send data from the board to the PC via UART. I can see that USART2 can be used as virtual com. But, when send data from board to the PC, I can not see anything on serial port, I use TeraTerm, Putty, Hercules. I thought the new version of STM32F407G-DISC1 board has this feature built in, but apparently it does not.Can anyone help me with this please ?

Hello,I have an STM32F373 and have successfully enabled a USB virtual com port.I currently send data packets from a PC host to the slave device and include a 'deviceId' in the packet data header.I would  like to support the single PC host communicating with multiple slave devices.   There would be no more than 12 slave devices, and I would like to add new devices. I plan on enabling a USB virtual com port for each slave device, and have them ignore packets not addressed to their deviceId.  Each device would only send a response if the packet is addressed to it.  The single host would ensure it only attempts to communicate with 1 device at a time.  I recall seeing that STM32 allows the USB port to connect to multiple devices in this way. ( not sure though )  What is the best way to connect each slave device to the USB connection?  Should I just split the 2 USB input (DM,DP) and send them to each slave device directly, or should I in

I am using STM32Cube Version: 1.15.0 Build: 20695_20240315_1429 (UTC) and on an STM32F767ZGTx with FW_F7 V1.17.1I have a running and tested application for which I am now including FW Update from SDCard.I got two examples on which to base the new code:The example project for IAP_Main (in STM32769I_EVAL)en.x-cube-iap-sdThe IAP occupies sectors 0 & 1 from 0x0800 0000 - 0x0800 FFFFLinker:  /* Entry Point */ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ _Min_Heap_Size = 0x200; /* required amount of heap */ _Min_Stack_Size = 0x400; /* required amount of stack */ /* Memories definition */ MEMORY { RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K } The application is from 0x0801 0000 to 0x080F FFFFLinker:  /* Entry Point */ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ _estack = ORIGIN(RAM) + LENGTH(RAM

Hi I have the project with the chip STSAFE_A110I don't need to development the application I just need to confirm the hardware is ok, for example, obtained the sn of the chip is successfully or other wayI don't want to add the stsw-safea1-mw to my project, There's no other easy way?

Hi,I have a current project using the M7 that I need to port over to the A7. The goal is to be running bare-metal code on the A7, like we are on the M7. Currently, I am following this open source guide to run bare-metal on the A7 and it seems to work fine. Does ST provide any support for running bare-metal on the A7? Does the stmCubeIDE allow for this? Is there a guide on porting a project from the M7 over to the A7? Any help or information regarding this would be helpful! Thanks!

I am currently ramping up a new project which has a HyperRAM installed (S70KL1282 - like in the example project of STM32H735G). With the help of this sample project code I can successfully write and read with memory mapped mode from the 16 MB RAM - but not 100%.I implemented a test routine, which counts the read errors of faulty reads after writing a pattern to the RAM. I get between 15 and 40 faulty read accesses when checking the complete 16 MB Ram.I tried to change the initialisation parameters for the OctoSPI (clock prescaler, CS high time, recovery time etc. But this doesn't solve the problem.I tried "rewriting after faulty read" - which is however not a solution: After detecting a faulty read, rewriting the pattern and reading it again: returns correct readings. So the RAM seems to be working in general.Can anyone tell, which parameters might be responsible for the wrong writings/readings?Any suggestions welcome!BR GS

HI STM Team,I am new to STM32 Board. I am using NUCLEO-F439ZI Board. When I was connecting my USB-OTG side to my PC, I will suffer from the "Unknow USB Device" Error, The error screenshot was attached below for your reference . Please Guide me to rectify this error. Its is driver problem means where I get the driver software for USB-OTG.Thank Youwith regards,Ramachandran.S  

 I'm fairly new to embedded work and noted that the pin layout that was given for X-NUCLEO-53L5A1 was for the F401RE, which I initially tested, but when attempting to configure it with the H743ZI2 I wanted to maintain the use of the ETH and USB port pinouts. If anyone has a bit of insight on how I can do this that would be gratefully appreciated! 

Hi,The datasheet of the M95M04-DR 4-Mbit serial SPI bus EEPROM (https://www.st.com/en/memories/m95m04-dr.html) mentions on page 24 the device is implementing "Error correction code (ECC x 4)".What is the method to be impelennted on the microcontroller to be informed when the ECC did (or even did not) correct an internal error.I want to use this information to predict some kind of wear level for that memory group.And may be release myself of the burden to implement CRC checks on my data myself.ThanksStefan

Hi, I am trying to do an application where I am using 2 PDM output digital MEMS microphones to get a stereo sound from them and then play it. My question is when I select I2S as Full-Duplex Master for STM32F407VG it only has 1 SD pin. Should connect both microphone's SD pins on this pin or what? Can anyone help me about how to connect two microphones to a single I2S peripheral?

Dear all,I've been wrestling with a communication glitch that's been causing me some serious headaches. Here's the lowdown: I've got this control board hooked up to a pump, and I've been trying to send commands to it via USART1 on my own STM32H735G-DK. The problem? It seems my board's only sending half the message, which is a major problem because those messages serve as commands for the pump.After some debugging, I've narrowed down the issue to my UART interrupt. I thought I'd solved the issue by disabling the interrupt, sending the data, and then re-enabling it once the message was fully sent. But alas, that meant losing crucial data coming back from the pump, which is just as vital as sending commands. So it's a classic catch-22 situation: sacrifice the first half of my Rx message to send data, or lose the second half of my Tx message to receive data. I've verified this by scrutinizing the signal with my Oscilloscope's Decoder.My messages are short, typically 1-40 characters, but th

Sorry, I have another question to ask everyone. I'm currently using the Nucleo F429ZI with SPI interface to receive 12-bit encoded data from another ADC. The Vdrive of that ADC can provide 3.3V or 5V for driving. However, the high level of the STM32F429ZIT6 is 3.3V. If I want the SPI high level to be 5V, what methods can I use to achieve this? Originally, I was researching GPIO's Open Drain to use an external 5V to accomplish this, but in CubeIDE, the SPI is set to Push-Pull. So I would like to ask, when using STM32, how can I achieve a 5V high level if the SPI requires it? 

Not a question: just to share with you my experience and "tricks" to connect a QSPI PSRAM on STM32U5A5/STM32U575 and potentially other MCUs (from a FW point of view, not HW).BackgroundI want to extend my own PCB, STM32U5A5 (LQFP64) with an external RAM (PSRAM). The chip I use is: IS66WVS4M8ALL. It gives me additional 32Mb = 4MByte of SRAM. I want to use in Memory Mapped Mode (for Read and Write).Using FMC or OCTOSPI with 8bit data lanes is not possible for me on 64pin LQFP). So, just OCTOSPI1 in QuadSPI (QSPI) mode.The important parameters of the chip to bear in mind (becomes important later/below):33MHz normal (SPI) speed104MHz fast (QSPI) speed1024 byte page wrap - important to be in mind this "feature"Clock ConfigurationI use PLL2N. The reason: the OCTOSPI can be clocked up to 200MHz, even the MCU and core clock (SYSCLK) is just 160MHz.But when selecting PLL2N for OCTOSPI1 clock - it can provide 200MHz (but just for OCTOSPI).This is great, because:with SYSCLK = 160MHz - it is too fa

I am experimenting with an STM32 running Azure RTOS connected to Azure Cloud to perform Over The Air (OTA) updates of the firmware via an IoT SIM connection.However when the cellular signal strength is poor the connection often fails or times-out during updates.When that happens the update restarts from the beginning and often hits the same problem again and again.1/ Is there a way to (easily) chunk up the download so on error the download restarts from the last good packet received rather than starting over from the beginning?  2/ Alternatively is chunking more easily achieved with other tools such as say FreeRTOS, AWS cloud services etc?

In the X-CUBE-CRYPTOLIB v4.1.0, the documentation say that cmox_cipher_decrypt() accept the CMOX_AESFAST_CFB_DEC_ALGO as algo. But CMOX_AESFAST_CFB_DEC_ALGO is not defined, instead there is a CMOX_AESFAST_CFB_DEC_ALG in cmox_cfb.h.

Hello! I am developing a custom board based on STM32MP151C MPU (TFBGA 361pins) with a RMII Ethernet PHY, and I have a simple question regarding to the PHY interrupt signal -sorry if this is a duplicated question, I haven't found a related topic in the forum-.Is it mandatory to route the PHY interrupt output signal to a ETH1_PHY_INTN pin (any of the pins with this alternate function available) to capture interrupts? I have checked evaluation boards, and:MB1263 board (STM32MP157FAA1) uses PG0, which does not has ETH1_PHY_INTN as an AFMB1272 board (STM32MP157CAC3) uses PA6, which does not has ETH1_PHY_INTN as an AFIf PHY interrupt pin can be routed to any MP1 interrupt-capable pin, what is the purpose of the ETH1_PHY_INTN alternate function?Many thanks in advance. Regards,

Using the STM32CubeProgramer (v2.16 from a Windows 11 laptop) with my NUCLEO-U575ZI-Q board has, from this morning, resulted in only the response:UR connection mode is defined with the HWrst reset modeST-LINK SN : 003E004C3532510F31333430ST-LINK FW : V3J13M4Board : NUCLEO-U575ZI-QVoltage : 3.29VError: No STM32 target found! If your product embeds Debug Authentication, please perform a discovery using Debug AuthenticationLooking at the various posts here about fixing programming issues, I have tried setting STM32CubeProgrammer to "Under reset" mode and holding the RESET pin down from power-on while I attempt to connect, but all that does is get me a different failure message:UR connection mode is defined with the HWrst reset modeST-LINK SN : 003E004C3532510F31333430ST-LINK FW : V3J13M4Board : NUCLEO-U575ZI-QVoltage : 3.29VError: ST-LINK error (DEV_TARGET_HELD_UNDER_RESET)I have also tried the same procedure but allowing the board to power on first and only then holding reset and trying

I've already looked at this post (https://community.st.com/t5/stm32-mcus-embedded-software/enabling-lwip-in-nucleo-h563zi/td-p/624725), but I don't understand how to use the GitHub project. Is there a complete, runnable project available for reference? I'm having trouble understanding how to use the project on GitHub.Please Help！！

Hi,we are looking for the source code of the TouchGfx Demo which is installed on the STM32H735G-DK Eval Board.We found the repository but link the folder to the TouchGfx Demonstration is not available any more:https://github.com/STMicroelectronics/STM32CubeH7/tree/master/Projects/STM32H735G-DK/Demonstrations/TouchGFXOnly the binary is still available.Is there a reason, why the source code of the TouchGfx Demo was removed or can the Demo be found on another location?Thank you and best regardsRK_IOT 

Hello! The AN2606 manual does not describe which pins of STM32H503EBY UART1 uses.STM32H503EBY have WLCS25 package, but i found information only for others packagesOn SO8, WLCSP18, TSSOP20, and UFQFN28 packages USART1 PA9/PA10 IOs areremapped on PA11/PA12.Could you tell me which pins shoud be use with WLCS25 ? 

Hi,I'm working on a project using stm32f746 and touchGFX. I need to store some data into flash and change it when I desire for that, I guess I have to erase the whole sector, which I don't want because I have some data in every sector. I use 85% flash for now. So is there any way to delete specific memory before writing?

After the last update the app is not crashing anymore, But how can I write data to it via the App.   All toggles are not clickable. And the code example of the MX_NFC7_Process this function is completely empty. I realized to read the status by copying the lines:   NFC07A1_NFCTAG_ReadMBCtrl_Dyn( NFC07A1_NFCTAG_INSTANCE,&mbctrldynstatus ); printf( "\n\r\n\rCtrl MB status register value:" ); printf( "\n\rHost(i2c) Missed Message = %d", mbctrldynstatus.HostMissMsg ); printf( "\n\rRF(reader) Missed Message = %d", mbctrldynstatus.RFMissMsg ); printf( "\n\rHost(i2c) Put Message = %d", mbctrldynstatus.HostPutMsg ); printf( "\n\rRF(reader) Put Message = %d", mbctrldynstatus.RfPutMsg ); printf( "\n\rMailbox Enable = %d", mbctrldynstatus.MbEnable );   And I can modify the MbEnable bool via the app but I would like to write a message via the app. Is there a way to do so. Kind regards,

I am sending multiple bytes in spi protocol. The sender is sending properly through AARDWARK(Total Phase Control)Software. But only the odd number of bytes are received and the receiving is not proper using these HAL_Functions. What is the issue?check the following logic and help me if you couldint main(void) {SystemClock_Config();MX_GPIO_Init();MX_SPI3_Init();MX_LPUART1_UART_Init(); HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_SET);/*HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_RESET);HAL_SPI_TransmitReceive(&hspi3, data_tra, data_rec, 5, HAL_MAX_DELAY);HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_SET);*//*HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_RESET);HAL_SPI_TransmitReceive_IT(&hspi3, data_tra, data_rec, 3);HAL_Delay(1);HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_SET); */ HAL_GPIO_WritePin(GPIOG, GPIO_PIN_12, GPIO_PIN_RESET);HAL_SPI_Transmit(&hspi3, data_tra, 3, HAL_MAX_DELAY);HAL_SPI_Receive(&hspi3, data_rec, 3, HAL_MAX_DELAY);HAL_GPIO_Writ