Solved

Hi. I was using STM32CubeIDE 1.14.0 until yesterday.Build Analyzer worked fine in 1.14.0, but after updating to 1.15.0 using the update feature provided by CubeIDE, nothing is displayed in Build Analyzer. The build was successful and the <project>.map file was created, but the Build Analyzer information was not displayed, and I uninstalled and reinstalled CubeIDE, but it was the same.   

Greetings Everybody,I have Nucleo-F207ZG board. I want to try RTC feature of this STM32. In past i did try using RTC but after some days the time used to drift and it was like 4 seconds ahead than actual time after on week and after 1 month time was ahead like almost 15 seconds. If you have any step by step procedure of RTC smooth digital smooth calibration then please share. I have gone through various application notes but i am getting more confused... Please help me.

Hello. Could someone clarify for me where this message is coming from and how can I fix it?stm32_etzpc bus@5c007000: rng@54003000 not allowed on bus (-13)Is it OP-TEE or U-Boot miss-configuration?I'm trying to patch openstlinux-6.6 OP-TEE and U-Boot for the STM32MP157C Odyssey based on the https://github.com/Seeed-Studio/meta-st-odysseyThis is my boot log:NOTICE: CPU: STM32MP157CAC Rev.Z NOTICE: Model: Seeed Studio Odyssey-STM32MP157C Board NOTICE: BL2: v2.10-stm32mp1-r1.0(release):v2.10-stm32mp-r1.2-dirty(cfe4a020) NOTICE: BL2: Built : 08:41:18, Jun 30 2025 NOTICE: BL2: Booting BL32 I/TC: Early console on UART#4 I/TC: I/TC: Embedded DTB found I/TC: OP-TEE version: 4.0.0-stm32mp-r1.2-dev (gcc version 13.3.0 (GCC)) #1 Mon Jun 30 08:40:36 UTC 2025 arm I/TC: WARNING: This OP-TEE configuration might be insecure! I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html I/TC: Primary CPU initializing I/TC: WARNING: All debug accesses are a

Originally a comment on this tutorial  - moved to main forum for better visibility & discussion ...I followed the first part of the tutorial (enabled USART2) and included the following code snippets for my STM32 NUCLEO-H7A3ZI-Q board. /* USER CODE BEGIN PV */ uint8_t buffer[1]; /* USER CODE END PV */ /* USER CODE BEGIN 2 */ HAL_UART_Receive(&huart2, buffer, 1, 0xFFFF); HAL_UART_Transmit(&huart2, buffer, 1, 0xFFFF); /* USER CODE END 2 */ /* USER CODE BEGIN WHILE */ while (1) { HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_0); HAL_Delay(100); /* USER CODE END WHILE */ But I wasn't able to write any characters or anything on my serial console. Kindly give some suggestions.

Please suggest recommended values for EMMC for the following parameters:Max Read/ Write speed supportedWhat is maximum memory density it can support?What is the bus width it can support?Any recommended NAND based EMMC part number of memory density 16GB and 3.3V supply voltage, which performs efficiently with STM32H757XIH6?

I'm using STM32CubeMX 6.12.0, with the firmware package U0_V1.1.0.When generating code for a STM32U073, the file system_stm32u0xx.c is generated, which contains the implementation of the SystemCoreClockUpdate() function.This file seems to be a mere copy of the firmware package's file "<...>\STM32Cube\Repository\STM32Cube_FW_U0_V1.1.0\Drivers\CMSIS\Device\ST\STM32U0xx\Source\Templates\system_stm32u0xx.c"I'm attaching it for reference.On line 330 we have: tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U) & 0xFU]; It seems that this should actually betmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos) & 0xFU]; since RCC_CFGR_HPRE_Pos is 8, not 4 (as defined in stm32u073xx.h:5524).The RM agrees with the value 8: §5.4.3 shows HPRE[3:0] in position [11:8] in RCC_CFGR. Also note that stm32u0xx_hal_rcc.c:396 has the correct value (it uses the macro RCC_CFGR_HPRE_Pos, in HAL_RCC_OscConfig()).   Note also that the same bug pot

Hi..  I am using STM32L476 Nucleo board. When i tried to erase a flash page using HAL_FLASHEx_Erase(), the FLASH_WaitForLastOperation() returns a HAL_ERRORI've seen similar issues in the community, but unfortunately, similar solutions just don't work.And the error code is 0xA0 , how can I fix thisStatusDef FlashWr(uint32_t flash_addr, uint8_t *pData, uint16_t length) { uint8_t *pBuf = (unsigned char *)flash_write_buf; uint16_t cnt; // valid length in current sector uint32_t flash_addr_base; uint32_t addr_offset; bool cmp_result; uint16_t i; uint64_t val; uint16_t addr; StatusDef sta = STA_OK; while (length > 0) { flash_addr_base = (uint32_t)(flash_addr & ~FLASH_SECTOR_MASK); addr_offset = (uint32_t)(flash_addr & FLASH_SECTOR_MASK); cnt = FLASH_SECTOR_SIZE - addr_offset; if (length < cnt) { cnt = length; } FlashRd(flash_addr_base, pBuf, FLASH_SECTOR_SIZE); cmp_result = FlashCmp(pBuf + addr_offset, pData, cnt); if (false == cmp_re

Please enlighten me. I added FreeRTOS to my STM32CubeIDE project using IOC. I discovered that I had to choose either CMSIS_V1 or CMSIS_V2 as the FreeRTOS Mode, else FreeRTOS would not be included. I chose CMSIS_V2. I then noticed the FreeRTOS Configuration pane and added a task, timer, and Queue. Upon finding the generated code, I noticed they are created with osThreadNew, osTimerNew, , and osMessageQueueNew. I was expecting xTaskCreateStatic, xTimerCreateStatic, and xQueueCreateStatic instead. Are the three set of functions somehow the same, or is one a wrapper for the other, or what? Can I still use the FreeRTOS Reference Manual, or do need to find and consult the CMSIS_V2 OS manual instead? Or, maybe I did something wrong.

hello, I have started a project where I have to use SPI, USART, and some modified labeled GPIOs in the nucleo-H755ZI-Q (nucleo-144). Whenever I configure the GPIOs in my ioc file and click generate code. My Cube IDE is not auto-generating code for my modified GPIOs. i have checked again and again there is no option for selecting the core for GPIO_output. Has anyone ever encountered such a problem? For reference, I will attach my project file.  1. I have used Cube MX for generating the IOC file and then imported it into Cube IDE. It did not work.2. I have repair reinstalled my Cube IDE. No use, did not work. 3. I have downloaded and installed the upgraded version 1.18.1. still facing the problem.4. I have downloaded and installed the 1.16.0 version. still facing the same problem. 

Yes, I use Cube.In the documentation I read that eMMC is connected to SDMMC1.SDMMC1 can be configured either as SD or MMC. I get the SD option in FATFS only when SDMMC1 is configured as SD.OK, I found the example to use MMC driver, I configured it.Anyway - it doesn't work. I get SDMMC_ERROR_CMD_RSP_TIMEOUT.Here's my SDMMC1 initialization:static void MX_SDMMC1_MMC_Init(void) {   /* USER CODE BEGIN SDMMC1_Init 0 */   /* USER CODE END SDMMC1_Init 0 */   /* USER CODE BEGIN SDMMC1_Init 1 */   /* USER CODE END SDMMC1_Init 1 */ hmmc1.Instance = SDMMC1; hmmc1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; hmmc1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; hmmc1.Init.BusWide = SDMMC_BUS_WIDE_8B; hmmc1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; hmmc1.Init.ClockDiv = 2; if (HAL_MMC_Init(&hmmc1) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN SDMMC1_Init 2 */   /* USER CODE END SDMMC1_Init 2 */   } UPDATE:Now I'm co

Hi.We have an application with a touch screen and 4 physical buttons. We have designed a demonstration GIU in TouchGFX, but to allow the simulator to handle presses on the hardware buttons, we have added the hardware buttons on the display. Consequently the display is made 100 pixels higher to have room for the buttons. It works fine for the simulator, but we cannot use the GUI design as it is for building the target application.I expected that it was possible to setup the simulator to hold the hardware buttons as an addition the the application display. But apparently not. It would be nice if it was possible to design the hardware button arrangement in addition the the GUI. The buttons should of cause have a legend and the button ID in addition to the arrangement. And of cause this should not be included in the target build. But it would be nice if it could hold additional fields (e.g. text areas and radio buttons) for simulating the rest of the hardwareDid I miss something?&nbsp

Hi ST staff,I need your help.Our custoemr needs to get the latest version of "Rohs statment" with signature as attahced.Could you pleased to share for it, moreover, thanks to upload on your website in near futurelike as Onsemi or Nexperia do so?

I added I-CUBE-wolfMQTT and I-CUBE-wolfSSL software packs to my STM32CubeIDE project in CubeMX built into CubeIDE. In CubeMX I set parameters:for wolfSSL:RTOS - Single THreaded (no RTOS / Baremetal)IO interface - LWIP (native API)for wolfMQTT:FREERTOS Support - FalseIO - LWIPDespite that, trying to compile project ends up with errors like "'SOL_SOCKET' undeclared (first use in this function)" or "'AF_INET' undeclared (first use in this function)". It is because example code uses sockets from LwIP library which can't be used if FreeRTOS is disabled. Even in lwipopts.h LWIP_SOCKET is defined to 0 and you can't enable it in CubeMX if NO_SYS (OS Awarness) is set to OS Not Used. Am I missing something? Did I misconfigure settings in CubeMX or are provided examples just wrong?

I have two issues Project details:a. Custom board.b. MCSDK 6.2.0, FOC, 15HKz , 3 shunt topology , BLDC motor,c. Motor pilot not configuredIssue1- I have calculated the Hall placement angle as mentioned in the documentation in one direction (clockwise). The motor smoothly starts also under loaded conditions, there are no issues. But when i try to spin in reverse direction with negative Iq under the same load it does not start. I plotted Ia, I b using cube monitorMotor does not start in reverse direction.Motor runs smoothly without problem in forward direction. How do i debug the issue?Issue2: Very much related to the above to find the root cause i have tried under no load in another setup using another motorI have followed hall placement angle procedure in one direction (clockwise) and i was successful in running the motor in no load conditions in both directions with +Iq, -Iq. Placement angle was around 60DegressBut if i followed the same procedure to find the placement angle

There is no code generated for the led_rgb_toggle() call here:led_rgb_toggle() is an inline function:static inline void led_rgb_toggle( GPIO_PinState r_state, GPIO_PinState g_state, GPIO_PinState b_state ) { #if defined PROJECT_WITH_RGB_LEDS if( r_state ) HAL_GPIO_TogglePin( LED_R_GPIO_Port, LED_R_Pin ); if( g_state ) HAL_GPIO_TogglePin( LED_G_GPIO_Port, LED_G_Pin ); if( b_state ) HAL_GPIO_TogglePin( LED_B_GPIO_Port, LED_B_Pin ); #endif } PROJECT_WITH_RGB_LEDS is defined in the Project defines (name has been changed for confidentiality): It is working in other places.Why would there be no code generated here? This is CubeIDE v1.13.0 on Win 11There are no build errors or warnings.

Hello, I have x nucleo 09a1 and I managed to run it in wake up mode with a different processor than stm and register. But there is a high current in wake up mode and power down mode. I am sharing the relevant graphics and code, please help.

Moved from this thread. Thanks for the previous response — it helped me understand the configuration better.   Now I have a follow-up doubt:   In STM32CubeIDE, I can see multiple pin options for FDCAN1_RX and FDCAN1_TX in the pinout view. However, when I checked the STM32H747I-DISCO board, those selected pins (e.g., PB8, PB9, etc.) don’t seem to be accessible via any header pins or exposed GPIOs on the board.   So my question is: Are there any accessible pins on the STM32H747I-DISCO board that I can actually use to connect FDCAN1 to an external CAN transceiver like the TJA1051T/3?   Would appreciate any guidance — especially if there's a known method to access these signals (e.g., via Arduino headers, PMOD, or solder points).   Thanks!    

I am trying to connect to TTN v3 with P-NUCLEO-LRWAN2.Please let me know the latest Firmware for Gateway and Firmware for end devices.

Hello, We are using ST33HTPH2X32AHE1 and SGM804-2.93YN5G chips for our application. Can you please share MSL (Moisture Sensitivity Levels) for this IC? Thanks, Sonali

I am using STM32CubeIDE version 1.17.0 and trying to develop a custom board using X-CUBE-DISPLAY with a graphics display using the ST7789V controller.  This is a design update for a previous board that was using a 7-segment LCD display.  I have a preliminary version of my software running on a NUCLEO-G071RB (with external flash disabled) as a proof of concept.When I open my .ioc file and select Manage Software Packs, it shows X-CUBE-DISPLAY as installed, versions 1.0.0 up to 3.0.0, but they are all marked with a red cross.  Hovering the mouse on 3.0.0 shows "This version of the pack is not compatible with the current version of STM32CubeIDE. It is compatible with STM32CubeIDE from 1.11.0 to 1.12.1".  Earlier versions show correspondingly early versions of the IDE.  Version 1.12.1 or earlier is no longer available on the STM32CubeIDE download page.Does this mean support for X-CUBE-DISPLAY is discontinued, or is the message just wrong?  Is there any alternat

I would like to filter available products by the following specific peripherals, but those types of filters do not seem to be available.PSSIDMAMUXMDMALPDMAGPDMAHPDMASDRAM support andMinimum #of pins sized package to actually support 1 or 2+ SDRAM chips at 16, 24, or 32 bit Did I miss something or are there maybe future plans to support that kind of filtering ?Are there alternative papers/docs listing the products (and which are kept up to date) ? 

Split from WeAct BluePill + : SPI1 does not work (works with older generic BluePills !) - which is marked as solved.Please keep to one question per thread.finally : unfortunately notlots of things are working , but now , timer3 on pins PB0 and PB1 doesn't ... why ?

Hi everyone, I’m trying to split an ST25TV02KC NFC-V tag into two memory areas using the RFAL (RF Abstraction Layer) library:1. Area 1 (blocks 0 … END_A1) should be public (read/write without password)2. Area 2 (blocks END_A1+1 … max) should be protected by the CONFIG passwordMy overall approach:1. Enable Multi-AreaRead block 0x0A (the LCK_CONFIG register) Set bit 0 in byte 1 to enable multi-area2. Open CONFIG Security SessionGET_RANDOM_NUMBER (opcode 0xB4) with 1-byte manufacturer code (0x02)PRESENT_PASSWORD (opcode 0xB3) with [IC-code, PWDID, encrypted 4-byte challenge]3. WriteConfiguration for END_A1FID=0x00, PID=0x01, DATA=END_A14. Verify with READ_CONFIGURATION (opcode 0xA0)5. Write user data into Area 1 (public) or Area 2 (protected)Despite following the ST25TV02KC datasheet, every time I issue the WRITE_CONFIGURATION command for setting END_A1, RFAL returns a timeout (RFAL_ERR_TIMEOUT, code 4). Questions:1. Am I missing any preliminary command or flag before WRITE

Hello everyone,I’m working on an STM32H7S3L8H6H with two XSPI interfaces:XSPI1 (Quad-SPI) connects to an external PSRAM. XSPI2 (Octo-SPI) drives an external NOR flash, from which my application code executes directly.In my bootloader I configure both and start the external memory manager:MX_XSPI1_Init();MX_XSPI2_Init();MX_EXTMEM_MANAGER_Init();  This maps the flash at 0x7000_0000 and the PSRAM at 0x9000_0000. After jumping to main() in the application (which is executing from the XSPI2 flash), I’ve marked XSPI1 as “Runtime Context” in CubeMX and still call:MX_XSPI1_Init(); But it hangs here:// inside MX_XSPI1_Init(): if (HAL_XSPIM_Config(&hxspi1, &sXspiManagerCfg, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { Error_Handler(); // stops here } I have validated each interface separately, XSPI2 boots and runs code, and XSPI1 handles PSRAM reads/writes without issue. So now, how can I access and use the PSRAM from within the application (which is itself exec

Hi everyone,I’m currently working with ST25TV02KC NFC tags and the ST25R3916B reader, using the RFAL library.I’m trying to access the configuration registers via the following functions:rfalST25xVPollerReadConfiguration(...)rfalST25xVPollerWriteConfiguration(...) I’ve already opened the CONFIG security session successfully using PresentPassword with PWD_CFG, so write access should be allowed.What I’m trying to do:Read and write configuration registers like:RW_PROTECTION_A1 → FID: 0x00, PID: 0x00END_A1 → FID: 0x00, PID: 0x01According to the datasheet (Table 4), these are valid config registers in group FID 0x00. Here is how I call the read function:uint8_t regVal = 0;ReturnCode err = rfalST25xVPollerReadConfiguration(RFAL_NFCV_REQ_FLAG_DEFAULT, uid, 0x01, &regVal); // PID = 0x01 for END_A1 And the write function:uint8_t newVal = 0x20; // Example: change END_A1 to enable dual-area modeReturnCode err = rfalST25xVPollerWriteConfiguration(RFAL_NFCV_REQ_FLAG_DEFAULT, uid,