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Hello,I am getting a hard fault while trying to integrate TouchGFX into a Zephyr application.The application is secure-only and the screen design is very simple: it contains a single screen with one box. When I debug the application, the hard fault occurs in the touchgfx::Application constructor (so I cannot debug), which is called indirectly through:FrontendHeap& heap = FrontendHeap::getInstance();I have already tried increasing the following Zephyr configuration values (CONFIG_MAIN_STACK_SIZE and CONFIG_HEAP_MEM_POOL_SIZE).CRC is enabled. DMA2D is disabled for now — the “Use DMA2D Accelerator” option is set to No in the X-CUBE-TOUCHGFX package, to keep the setup simple and eliminate one possible source of issues.The framebuffers are aligned and placed across AXISRAM3, AXISRAM4, and AXISRAM5The setup is as custom board with:MCU: STM32N65XXZephyr version: 4.4TouchGFX version: 4.26.1Zephyr SDK: 1.0.1I would appreciate any help, suggestions, or debugging directions.Thanks in advance.
I’ve got a working graphics system. It does high level operations on a 32 bit virtual image of the display’s resolution. The image is then translated to a 16 bit buffer image (RGB565 for an ILI9341 display). That image is then transferred over SPI to the display. The SPI drivers can be polled, interrupt driven, or DMA driven. Software drivers are used for all of this, and work.Moving to a different processor (U575 from L562), ChromART is available. It could be used for filling the virtual image, translating to the RGB565 image. 2D DMA can be used to transfer modified blocks to the display.Now the problem.The transfer works erratically in some cases. Some data (and I’m using mostly saturated colors) doesn’t transfer well into RGB565 (say 100% blue), it may just end up with black. Other times, the complete color palette is transferred properly.I’m investigating whether or not the repeated restart of the ChromART peripheral is a problem. Mostly what happens is that the mode sho
The user authentication service is under maintenance on September 17 at 6:00 a.m. CET for approximately 30 minutes. During this period, disruptions can occur. The impact is limited to versions earlier than STM32CubeMX V6.16.0 and STM32CubeIDE V2.0.0. The service returns to normal soon after maintenance is complete.What to do if a problem occursIf issues occur during the maintenance window, use st.com or try again after 30 minutes. If the problem persists after that time, contact ST through the Community for further assistance. Update September 17, 2026:The maintenance was successfully completed as scheduled on September 17.If you encounter any issues, please do not hesitate to contact us.
Hello everyone,I’m using Nucleo STM32N6 for a project of mine, and I used template XIP to begin with.In template XIP, clock frequency of the XSPI2 is set to 50Mhz without any prescalers, and VDDIO3 is set to 1 (1.8V). That setup works fine for XIP up to 85Mhz clock frequency, but above that at BOOT (00) it fails as soon as it tries to jump to a application. I haven’t been able to resolve this problem. Is it setup, or something with EXT_MEM middleware?In MX25 datasheet it can be seen that frequency heavily depends on dummy cycles, and 86Mhz corresponds to 8 dummy cycles, but on 200Mhz it requires 20. In EXT_MEM setup there is a 8D8D8D case where i go into during setup and it sets object to 20 dummy cycles, but I’m not sure is it successful in actually forcing that setup. Any help would be welcome.
I’m looking for a couple of Op Amps for a project, they really need to have a long production lifetime.The TSV781 is one I’m looking at based on the specs., but I’m confused about how the 10 year commitment works for these (it is obviously different to the STM32).The product page has the Ten Year stamp, which to me implies 10 years from now (or at least this year), however the date shown is November 2029 (which agrees with the longevity page) - only 3 years!The further problem is that the device data sheet says initial release July 2022 which would mean only 9 years support.Obviously I need to use a different device, but how to choose?My apologies if this is in the wrong place, but “Analog and Audio” does not appear in the forum list.
Hi everyone,I'm having a very annoying issue with an STM32U5G9ZJ and a Newhaven NHD-4.0-480480AF-MSXP-CTP display using an ST7701SN over 2-lane MIPI DSI.The basic communication works, but I cannot get any video onto the display.What worksThe panel responds correctly to LP short DSI commands:Reset works. ST7701 registers can be read. The initialisation sequence runs successfully. 0x29 Display ON works. 0x23 All Pixels On makes the display white.So the panel and the LP DSI communication are working.What doesn't workAs soon as I try to send RGB888 video over HS DSI, the display stays black.I've tested this both using the LTDC/framebuffer and the internal pattern generator. The latter was to rule out the framebuffer/LTDC completely.The pattern generator starts successfully and the DSI registers show the video engine and both data lanes entering an active HS state, but the panel still stays black.I'm using:2 DSI lanes RGB888 Burst video mode 480 × 480 480 packet size Continuous clock Automa
Hi,Is there any stabilization or warm-up time needed by STM8S controller when interfaced with ADC for calibration?Usually for ADCs there is a warm-up time, so wanted to know if this MCU also has a warm-up time.
1.I would like to connect 6 Industrial Sensor which support (4-20ma) or (0-10 Volt ) to STM32H723ZGT6.Guide me both Manual circuit or any IC which can perform below TVS / series protectionPrecision shunt / scalingRC anti-alias filter2.How i can connect and what need to be done for io protection from Reverse polarity and Surge protection
Hello, I was wondering where can I find the Pick n place file to create the dev board. on the official site there is the BOM and the gerber files, but without the pick N place I can’t actually assemble it.Thanks for the helpRoman
Hi,I am using STM32G431CBU6 with HSI16 as the only clock source (no external crystal on the board), and I need to budget the resulting frequency error. I have a few questions about DS12589 Rev 2 (October 2019), Table 44 "HSI16 oscillator characteristics", page 107, and Figure 23 on the same page.Q1 (main question) — Are fHSI16 and Δtemp(HSI16) additive, or is Δtemp inclusive?Table 44 lists two separate parameters:Symbol Conditions Min Max fHSI16 VDD = 3.0 V, TA = 30 °C 15.88 MHz 16.08 MHz Δtemp(HSI16) TA = 0 to 85 °C −1 % +1 % For a single device over the 0 to 85 °C range, is the worst-case total frequency error:(a) −7500 ppm − 10000 ppm = −17500 ppm … +5000 ppm + 10000 ppm = +15000 ppm (i.e. the two parameters add), or (b) ±10000 ppm (i.e. Δtemp already includes the initial tolerance at 30 °C)?This makes a large practical difference for bit-timing budgets, so I would like to be sure.Q2 — Is a typical temperature coefficient (ppm/°C) available?Figure 23 shows mean/
Hello ST Community,I am following the tutorial "How to deploy an AI model on STM32N6 – Neural-ART":https://dev.st.com/edge-ai-docs/general/latest/en/docs/tutorials/how-to-deploy-ai-model-stm32n6-neural-art.htmlI successfully completed all the steps, but when building the application in STM32CubeIDE, I get the following linker error: arm-none-eabi-gcc -o "Test_inference_model_Appli.elf" @"objects.list" -l:NetworkRuntime1201_CM55_GCC.a -mcpu=cortex-m55 -T"C:\Users\ROMAINC\Test_inference_model\STM32CubeIDE\Appli\STM32N657X0HXQ_ROMxspi2.ld" --specs=nosys.specs -Wl,-Map="Test_inference_model_Appli.map" -Wl,--gc-sections -static -Wl,--cmse-implib -Wl,--out-implib=./secure_nsclib.o -L../Middlewares/ST/AI/Lib --specs=nano.specs -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-groupC:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../..
Hello,I am using an STM32N657 on a custom board.I need to use PA6 as PIXCLK, so I would like to move the BOOT1 function from the default PA6 pin to PN10.According to the STM32N6 BootROM/OTP description, I understood that BOOT1 can be remapped using OTP19 (BOOTROM_CONFIG_10): I programmed OTP19 with 0x15200000 in STM32CubeProgrammer to change BOOT1 from PA6 to PN10.Before programming OTP19, I could connect to the MCU normally through ST-LINK/SWD using PA6 as BOOT1.However, after programming OTP19 to 0x15200000, I can no longer connect to the MCU.The same issue has occurred on more than one custom board.My test conditions are:MCU: STM32N657 I/O supply voltage: 1.8 V BOOT1 remapped to: PN10 OTP19 programmed value: 0x15200000 PN10 is held HIGH before and during reset ST-LINK detects the target voltage During connection, STM32CubeProgrammer can sometimes identify Device ID 0x486, but then reports that the connection to device 0x486 is lost The board works and SWD connection is available bef
Hello ST Team,We have a custom STM32N657Z0H3Q board on which BOOT1 is routed to PN10 instead of the default PA6.To configure the Boot ROM to sample BOOT1 from PN10, we programmed OTP Word 19 (BOOTROM_CONFIG_10) as described in RM0486 Rev. 4, Section 5, Table 18:dev_boot_port [24:21] = 9 → Bank N (PN) → 9 << 21 = 0x01200000 dev_boot_pin [28:25] = 10 → Pin 10 → 10 << 25 = 0x14000000 OTP19 = 0x15200000Steps FollowedBefore programming, we read OTP through SWD. OTP19 was 0x00000000, with status 0x00000000, indicating that it was unprogrammed and not write-locked. SWD/ST-LINK access was working normally. We programmed OTP19 with 0x15200000 using STM32CubeProgrammer v2.23.0, without enabling the lock option. The tool reported: "OTP words programming done successfully" After the next power cycle/reboot, the device no longer enters Development Boot. Instead, it boots from Flash, and our FSBL and application start running normally. SWD/debug access is no longer available.Same
Hi all,My MX_SDMMC1_SD_Init() is failing and dropping into Error_Handler() on a custom STM32U575RGT6 board.I traced it down to SD_PowerON() failing — it returns HAL_SD_ERROR_UNSUPPORTED_FEATURE. Digging deeper, this happens because one of the internal response-check calls (SDMMC_GetCmdResp1() / GetCmdResp2() / GetCmdResp3()) is returning SDMMC_ERROR_CMD_RSP_TIMEOUT (the CTIMEOUT flag gets set) — basically the card isn't responding to one of the commands sent during power-on/init.i have checked HAL_SD_InitCard() clock divider formula where HAL correctly computes ClockDiv = 21 for 16 MHz kernel clock also measured SDMMC_CK on oscilloscope and getting 381.7 kHz which is within spec (≤400 kHz)we have external pull ups at all pins of sdmmc plus when i run on this fun SDMMC_CmdAppCommand i can see activity on CMD line but i didnt get any response on that line.the clock i’m giving is HSE PLL1P to SDMMC clock mux which is 16Mhz final
Hello guys. I’m currently trying to implement a CI/CD pipeline on my project, using a dedicated RPi device (Raspbian) as a test-bed. I use a python script to generate the cmake.txt file and then the arm libraries and ninja to build the .bin file and the programmer cli to flash it onto my device. The thing is that my approach works for now, but trying to include external packages like CMSIS dsp, or user provided libraries is such a huge pain. It works for now that the package is a very specific one, but this might change in the future, with the inclusion of new packs/libraries.So my question is, what is the best way -- Generate the cmakelist file that also includes the external packs/librarie. Is there a possibility to use an extension on Vs code server installed on my RPi ? -- Link said packages/libraries. I currently have a copy of a specific version of the Board FW files where most of the middleware files are, my imported libraries and the external CMSIS packs. Any advice would be we
Greetings,I am not quite a USB, or USBX, expert, but I do have a question.I have a custom HW design utilizing the H573, and the USB FS port, which according to the datasheetsupports a max of 8 configurable endpoints.We have a USB Hub chip integrated into the HW design, and hoped to support 4 USB devices behindthe hub. Assuming that each device is a 2.0 USB Flash Drive (Sandisk, or whatever vendor),and each USB Flash drive consumes 3 endpoints (control, IN and OUT), this is twelve endpoints just forthe flash drives.The number 8 (endpoints), is fixed in STM32H5 hardware? Am I correct in saying that the four flash drive application will never work? ThanksKen
Hello,I have recently tested the timing of DMA reading data from GPIO on an STM32H755 and found that the required input signal hold time is shorter than what is described in AN4031. I would like to ask whether my understanding is incorrect or if it is due to architectural differences in the chip.Test platform and configuration:Hardware: NUCLEO-H755ZI-Q, using the CM4 core, CM7 idle.System clock: SYSCLK = HCLK = PCLK2 = 8 MHz, APB2 timer clock = 8 MHz.Timer: TIM1 configured in PWM mode, CH1 outputs a 1 MHz square wave with 50% duty cycle, and the DMA request for the CC1 event is enabled.DMA: Using DMA1_Stream0, peripheral address is GPIOA->IDR, data width half-word (16 bits), peripheral address not incremented; memory address points to an SRAM array, half-word width, address incremented. FIFO disabled.External signal: A signal generator produces a 1 MHz PWM signal connected to PA0, and the phase is adjusted so that its edges align with the edges of the TIM1_CH1 output.Test method:Sta
I previously experimented with performing the FTM Demo (Firmware Upgrade) in ST25PC-NFC on an ST25DV Discovery board, using both the STEVAL-25R3916B and FEIG MR102 readers. The demo worked successfully with both readers, although there was some difference in transfer speed. We are now looking to implement OTA firmware updates on our NFC-enabled product, which is based on a PIC microcontroller. We have integrated the ST middleware into our application and are currently testing the firmware upgrade functionality using FTM. The firmware upgrade works correctly when using the STEVAL-25R3916B reader. I have attached the relevant logs below. However, when using the FEIG MR102 reader, the firmware upgrade does not work correctly. After comparing the ST logs, it appears that there is a difference in the timing and behaviour of the writeMsg calls between the two readers. With the FEIG MR102: The first packet is always transferred successfully. Almost all subsequent packets require a second at
Dear STM Community Team,We are working with the STM32N657X0H3Q microcontroller in our custom hardware design. We have interfaced S80KS5123GABHB020 Octal RAM devices with the controller using the XSPI interface.In our design, we are using a dual Octal memory configuration as described in the STM32N6 Reference Manual. The two 8-bit memories are configured to operate together as a 16-bit external memory interface.We would like your guidance regarding the correct STM32CubeMX configuration settings for this dual Octal memory setup.Our configuration details are: MCU: STM32N657X0H3Q External Memory: S80KS5123GABHB020 Interface: XSPI Memory Configuration: Dual Octal mode (two 8-bit memories forming a 16-bit interface) Intended usage: External RAM for (ltdc)framebuffer Memory mapped access: XSPI memory-mapped mode Could you please confirm the recommended STM32CubeMX settings for the following parameters? XSPI mode selection: Should the configuration be set as HEXASPI mode? Are
Hi, In the STULPI01BTBR datasheet I could find the timing spec only for SDR mode. I need to verify the DDR mode on our board and could not find the DDR mode timing spec. Can anyone please help to find the timing spec for ULPI interface DDR Mode. Regards,Shivakumar
Where can I find STM32H5F5J-DK demonstration firmware full source code?
I’m trying to set up flashing firmware and initializing the RTC clock on a blank or chip erased STM32H747Xi using the STM32Cube CLT package that contains the STM32_Programmer_CLI.exe command line tool. I can’t seem to write to the critical registers for RTC. Is there a procedure to set the RTC? If so, can you list the steps needed to do so?Thanks,Johnas
Hello, hope you all are doing well.I am unable to transmit messages over CAN using DMA on my STM32G431RB Nucleo board. My JLink didn’t show any errors in my code flow, but my logic analyzer did not register any CAN messages on the TX pin (PA12), and the output stays high. I also tried using a CAN adapter to read the messages which wasn’t fruitful. How can I debug this? I used this tutorial for reference: Thank you in advance!CanManager.cpp#include "CanManager.h"CanManager::CanManager(FDCAN_HandleTypeDef* hfdcan) : mHandle(hfdcan){ mFilterConfig.IdType = FDCAN_STANDARD_ID; mFilterConfig.FilterIndex = 0; mFilterConfig.FilterType = FDCAN_FILTER_RANGE; mFilterConfig.FilterConfig = FDCAN_FILTER_TO_RXFIFO0; mFilterConfig.FilterID1 = TX_ID; mFilterConfig.FilterID2 = 0x7FFU;}HAL_StatusTypeDef CanManager::Init(){ HAL_StatusTypeDef ret = HAL_FDCAN_ConfigFilter(mHandle, &mFilterConfig); if (ret != HAL_OK) { return ret; } ret = HAL_FDCAN_Start(mHandle);
Hello everyone,I am experiencing an issue with STM32CubeMX version 6.18.0 right after a fresh installation. The software is unable to connect to the server to download repositories or updates.Here are the details of my situation:Network Environment: I am using my office Wi-Fi, which does not use a proxy server. Other applications connect to the internet without issues. Error Message: I keep getting a "Problem during server connection" error. Troubleshooting Done: I have already gone into the Connection Settings and tried changing the proxy settings to "No Proxy" as well as "System Proxy", but neither option resolved the issue. Since there is no proxy on our network, I am unsure what is blocking STM32CubeMX from reaching the server. Has anyone encountered this with version 6.18.0, or does anyone know which specific ports or URLs need to be whitelisted in our office firewall?Any help or guidance would be greatly appreciated. Thank you!
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