ADC sampling rate

[kl-dev]

1. device STM32H743IIT6

2. 

   

   I only use a single ADC.

3. What are "tsampling + N/2 + 0.5", So what is N?

4. How can the sampling rate (samples per second) be calculated? According to the documentation, TCONV = Sampling time + 7.5 ADC clock cycles; does this mean 7.5 ADC clock cycles is a constant?

[Ozone]

> What are "tsampling + N/2 + 0.5", So what is N?

The document you made the screenshot from should have a legend, explaining the symbols.
It could be the number of channels in a sequence, I guess.

> How can the sampling rate (samples per second) be calculated? According to the documentation, TCONV = Sampling time + 7.5 ADC clock cycles; does this mean 7.5 ADC clock cycles is a constant?

The “sample rate” is the overall parameter, defined not only by the ADC, but also by the trigger event.
In most cases, this will be a timer (TRGO), configured as trigger.
You set up the timer period independantly, and must assure  that one conversion (or sequence) is finished before the next trigger event occurs.

Unless you use “continuous mode”, were the ADC runs at full speed, and sample rate depends on the ADC clock and sample time settings.

If I care about sample rate and equidistance (which applies to most of my use cases), I use the timer-triggered method.

[kl-dev]

tsampling + N/2 + 0,5 trong tài liệu AN5354 (Bảng 11),

but there is no information about "N"