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Hello Everyone,I'm checking the STM32WL5MOCH6TR MCU of a custom board that i made a few years ago, and I don't understand something : - On the datasheet, it says that its frequency range supported is 864–928 MHz- When I open a CubeIDE project, I'm able to set a much wider range : LoraWAN example : SubGHz_Phy example : Is that intentional ? Maybe those Middlewares are general-purpose?
Hello, we are seeing a weird symptom in our application in which all LTDC registers are reading back the same seemingly random number. This is during a debugging session via system viewer (we are using Keil 5.40 and compiler 5), OR when reading and printing out values to serial at runtime. The LTDC seems to be operating properly (mostly, working through various issues but it's displaying graphics at least. I'm stumped, and so are the AIs I use. Any ideas as to why this might be?
I have troubles using SPI3 on STM32U575VG. After some time the transfer hangs and it is not possible to amend it until whole reset.Configuration: Only transmit, is feeds LCD display, 240 lines, 54 bytes each.APB3 clock 48 MHz. Manual CS handling, SCLK 1.5 MHz.Everything looks ok, it works, but after some time and on some boards only it hangs. The problem appeared in the start of production. Symptoms: after configuration and LL_SPI_Enable(), the DMA transfers 16 bytes to the FIFO. That's ok, DMA works. But after LL_SPI_StartMasterTransfer(), the transfer doesn't start.Looking at the pins, SCLK remains low and MOSI contains some data, but very slow, one bit interval seems to be 8 ms. Reset of the SPI doesn't help. Reinit of the whole MCU after STOP2 (without reset), including all clocks doesn't help. The only thing that works is the reset of the whole MCU. I have no idea where to look at more. The SPI is not overclocked, it doesn't wait for any external signal. It happens sometimes
Is there a STM32N6 throughput test on the USB 2-480Mb happened. I'm just curious because i'm getting a throughput on my design of * 97 Mb Just wondering what is a idealistic throughput to see if i need to edit something on my end or this is a expected throughput to get.
Hello,Here are a few things I need to clarify regarding the EVSPIN32G4 current measurement and the related MCSDK software:Referring to section 5.6.1, 5.6.2 and 5.6.3 of the UM2850, I believe that the topology using three standalone OpAmps presented in section 5.6.2 is not currently supported by MCSDK, is this correct?So, considering the 2 topologies presented in 5.6.1 and 5.6.3, is there a major disadvantage to go for the internal PGA solution compared to the first configuration which requires external feedback networks on the inverting side of the OpAmp?At the end of section 5.6.3, it is recommended to connect the inverting input of the PGAs to shunt resistors to perform differential current measurement in case of high current application, but I don't have the possibility to do it in MCSDK since only the "single ended" sensing type is available, what do you propose in this case?Thanks in advance and best regards.
I'm looking at setting the RDP Level to Level 1 for an STM32F103 and I don't see the AA BB CC type stuff like in the current manual. Is this something that STM32CubeProgrammer is doing on purpose for this MCU? I definitely don't want to enable Level 2 by accident and brick my chip. Here is a screenshot of what I see:Is it safe to check this?
I can't seem to read the OTP bits on the stm32N6 with any of my boards with 2.22 of the stm32CubeProgrammer. But i can on version 2.21 Everything else works fine with the chip.
Hello,I am evaluating the VND5T100AJ-E for an automotive application where I need to drive a 24V contactor. My design requirement is i need to drive the IC through the PWM signal as input.I have reviewed the datasheet but do not see explicit PWM frequency ratings. My concerns are:Does the VND5T100AJ-E support continuous PWM switching for an inductive load?If this device is not recommended for PWM, could you suggest a similar specification alternative part with the same specifications that is specifically designed for PWM input @stmicro
Greetings, I'm trying to set up TIM4 per the reference manual (RM0016).With the clock set to LSI at 128kHz, the following code causes the PD2 output pin to appear constantly high visually via a wired LED. I would expect it would be blinking once per second. I don't have access to a scope so I can't see what is actually happening. Anyone spot anything I'm doing incorrectly?sim ; F_Master Prescalar tim clk ; 128_000 Hz / 1024 = 125 mov TIM4_PSCR, #0b1010 ; 2 ** 0b1010 = 1024 prescaler ; ARR at 0x7d = 125 mov TIM4_ARR, #0x7d bset TIM4_IER, #0 ; UIE: Update interrupt enable bset TIM4_CR1, #0 ; CEN: Counter enable...and the interrupt code:tim4_up_isr: ; PD2 blinks once per second ; from TIM4 bres TIM4_SR, #0 ; UIF: Update interrupt flag bcpl PD_ODR, #2 iret ...fwiw when I set line 5 of the interrupt code to use bres PD_ODR, #2, the output appears low visually.
Hello, I'm curious why TIM2 is correctly repeating in my code, whereas TIM4 with equivalent settings is not.In this code, the TIM2 indicator (fired by the TIM2 interrupt) is blinking twice a second (clock set to LSI, meaning 128kHz). I would expect the TIM4 indicator (fired by the TIM4 interrupt) to do the same; but it is being triggered immediately and much faster: so fast that to the eye it appears as a constant on.The reference manual RM0016 and datasheet DS7147 indicate that, given similar settings, both timers should be exhibiting similar behavior. What am I missing?Here's the code:; some typical setup hidden before this point ; PD3 is on, indicating LSI is clock source ld a, CLK_SWR cp a, #0xd2 jrne 1$ bset PD_ODR, #3 ; timer setup sim ; F_Master Prescalar tim clk ; 128_000 Hz / 1024 = 125 mov TIM2_PSCR, #0b1010 ; 2 ** 0b1010 = 1024 prescaler mov TIM2_ARRH, #0d0 mov TIM2_ARRL, #0d125 bset TIM2_IER, #0 ; UIE: Update interrupt enable bset TIM2_CR1, #0 ; CEN: Counter
Hello,I am currently experiencing difficulties using the STM32N6 NUCLEO board.My goal is to test NPU execution using X-CUBE-AI within CubeMX. However, I am stuck in an infinite loop inside the MX_X_CUBE_AI_Process function. Specifically, LL_ATON_RT_RunEpochBlock() continuously returns only the LL_ATON_RT_DONE status, preventing the loop from terminating as expected. do {ret = LL_ATON_RT_RunEpochBlock(&NN_Instance_Default);if (ret == LL_ATON_RT_WFE) LL_ATON_OSAL_WFE();} while (ret != LL_ATON_RT_DONE); I Can't get the LL_ATON_RT_DONE, only LL_ATON_RT_WFE.This issue persists even when using files generated via Cube AI Studio.I have configured the AXI and Clock settings in CubeMX (CPU: 600MHz, NPU: 800MHz, AXI: 800MHz). Since the model is simple, I am using internal memory only and have not enabled any security (TrustZone) or external memory settings.Environment Versions:CubeIDE: 2.1.1CubeMX: 6.16.1CubeAI Studio: 1.1.0CubeProgrammer: 2.22.0ST Edge AI: 4.0ST-LINK: V3
Hi,I am using one ADC with multiple channels on an STM32 device. I configured a timer trigger (external trigger) for the ADC, but I noticed that the trigger seems to apply to all channels of the same ADC, not just the selected channel.I would like to confirm:Is it true that one ADC has only one trigger source, and all configured channels share that trigger?Is it possible to configure different sampling/trigger properties per channel, or is the external trigger common for the entire ADC conversion sequence?My goal is to use different trigger timing per channel, but I am using only one ADC peripheral.Thank you.
Hi I have setup a small project in CubeMX v6.17.0 with FSBL and an application (secure domain only). As long as I use the default Flash and RAM region, debugging works fine. ROM (xrw) : ORIGIN = 0x34000400, LENGTH = 511K RAM (xrw) : ORIGIN = 0x34080000, LENGTH = 1536KIn the future the application will be way bigger (using TouchGFX), therfore I increased the Flash Region to 1.5 MB and the RAM Region will start at 0x34200000 with a length of 1.5 MB as well. ROM (xrw) : ORIGIN = 0x34000400, LENGTH = 1536K RAM (xrw) : ORIGIN = 0x34200000, LENGTH = 1536KSince I made this change it is not possible to step into the application. FSBL works well and is loading the App data from external Flash into SRAM (0x34000000) as requested. After jumping into the app connection to target is lost as soon as SystemInit funciton is called. Debugger can't write any more: Cannot remove breakpoints because program is no longer writable. Further execution is probably impossible. 0x3400095a
The boot fail light doesn't seem to function the way i would think it would. When* boot 0 == 0* boot 1 == 0* entire external flash == 0xff* using STM32N6-DK The boot fail light never seems to stay on? My thought is that part of the ROM would read the data from the flash do a CRC on the data and then if it matched then turn the light off. But it always seems to turn the boot fail led off no matter whats in the flash?
Hi folks,I am working on integrating SBSFU with my application. I've got one internal slot and one external slot. The update file is received fine, the header is written to the swap area to be installed after the reset. The reset occurs, SBSFU finds the header, decrypts the update file and swaps the file.However.. it gets stuck at SFU_IMG_Validation, writing the `pTestHeader` to `SLOT_ACTIVE_1_HEADER` address and triggers `SFU_IMG_FLASH_WRITE_FAILED` in `sfu_fwimg_common.c`.I assume that this part of flash is write protected? But I cannot find any mention of this in the SBSFU guides or files. It would be great if someone can help me figure out how to finalize this.09:35:13.652 > = [SBOOT] RuntimeProtections: 0 09:35:46.801 > 74640 bytes of ciphertext decrypted. 09:35:54.301 > Image preparation done. 09:35:54.301 > Swapping the firmware images.................................. 09:35:54.397 > Address = 0801D000, FwSize = 74640, len = 192 <-- added debug info 09:35:54.39
Title edited to reflect that this relates specifically to the NUCLEO-G070RB board.NUCLEO-G070RB in this board ADC channel 0,1 working ,other ADC channel not working is they any reason?
Mostly i have to use my device with battery. So i need to operate it as low-power as possible. When doing this low-power process(either standby-stop-or sleep deeep sleep etc. i have no experience about these modes), one ADC reading is critical for me. I always have to measure that ADC reading. How should i create the logic? After makins some research, most of peripherals are disabled during standby(i can not verify this if it was true or not). I think that i need a wake-up source to exit standby-stop or sleep modes. How should i configure this wake-up mechanism? Firstly i was plannig to use ADC as an wake-up source but i am not sure if it was true or not? Can you guide me to better options?
Hi,I am building a program that can flash new firmware onto a STM32H743ZIT6 via CAN. It does so by utilizing the dual bank feature and ping-ponging between bank 1 and bank 2. It receives the firmware via CAN and buffers it. Before writing it to the inactive bank it first erases said bank.When running form bank 1 this works just fine and it is able to reboot to the newly flashed bank. When going from bank 2 back to bank 1 however, it encounters an issue. It crashes in the erase step and will not restart.After I manually disable the SWAP_BANK bit using STM32CubeProgrammer it runs again on bank 1 without flashing again. This (I think) tells me it is deleting bank 2 while also running on it.Attached you find the function in question, do you have any idea where i went wrong? void foc_erase_inactive_bank() { // Determine inactive bank from SWAP_BANK bit uint8_t inactive_bank = (FLASH->OPTCR & FLASH_OPTCR_SWAP_BANK) ? 1 : 2; uint32_t bank_to_erase = (inactive_bank == 1) ? FLASH
Hi,Having just updated to STM32CubeIDE 2.1.1, I've created an STM32CubeIDE Empty Project (the only apparent relevant option) targeting the STM32F072 Discovery Kit as I want to experiment with the touch sensing capabilities, however when the project is created I don't see an IOC file. Has the workflow reverted to using STM32CubeMX to create the IOC file etc. please?Kind regards,Al
So I have the STM32 CUBE suite - and I remember there is a means to select example projects to start from.HOWEVER - I cannot find that any more :(Mr Google tells me to do this:Start STM32-CUBE, select FILE->NEW->OTHER->Create New STM32 ProjectThis does not provide me with ready made examples to choose from. These are very stripped down, not even hello world, just a main() with a endless for(;;) loop. With the default oscillator/clock.I'm sure you have seen the BOARD selector, you select the chip, the board and you can pick examplesThat is what I am looking for. Where is that?
Hi all,I’m working on STM32U385 with OEMiRoT and following this ST wiki page:https://wiki.st.com/stm32mcu/wiki/Security:How_to_adapt_a_user_application_to_ROT_for_STM32U3However, I cannot see any of the images/diagrams in the page (they appear blank or missing).I tried different browsers (Chrome, Edge, Firefox) and different PCs, but the issue remains.Can someone confirm if the images are visible on their side, or if this is a known issue with the wiki page?The diagrams are quite important to understand the ROT/OEMiRoT flow and flash layout.Thanks in advance.Marco Giacomin
Hello Community,I'm working on a storage module using SDcard for my project. In my application I would like to read and write to the SDcard using the MDMA as indicated in the reference manual of my micro-controller. For now I have the SDcard working in 4-bit mode but using the CPU.I use the STM32H757II on a PCB connected to a SDcard reader on the same PCB.With CubeMX I generated the code that allow me to mount a FATFS on my microcontroller and I can create/open/write/read on file with no problem.But my application needs to log a lot of data to the sdcard periodically, to free-up the CPU I would like to do the transfer using a DMA.In the reference manual 58.5.7 MDMA request generation it is explained that the MDMA can control the SDMMC peripheral to start new transfer"The internal trigger lines from the SDMMC allow passing direct request to MDMA controllerto enable successive transfers from/to different internal RAM addresses without CPU use. [...]The event can trigger the clearance of
Hello All,On the STM32U575 is there any guidance regarding use of external resistors? I don't see any on the reference design so I didn't put it on my board either. USB data rates are fairly slow, is impedance matching even required?We are using TinyUSB so that we can avoid the RTOS and it works fine mostly, but occasional USB disconnects. We discovered by accident using a longer cable seems to resolve this. I am wondering if it is a fluke or if there is some rational reason for this.Thanks!
Hi,I am currently testing OEMiROT and I performed the following 3 tests.Test 1: Default example(Overwrite mode enabled + separate Secure and Non-Secure applications)How to start with OEMiRoT on STM32U3 - stm32mcuProject:OEMiROT_Appli_TrustZoneOEMiROT_BootConfiguration:#define MCUBOOT_OVERWRITE_ONLY /* Defined: FW installation uses overwrite method. Undefined: FW installation uses swap mode. */ #define MCUBOOT_APP_IMAGE_NUMBER 2 /* 1: S application only if FLASH_NS_PARTITION_SIZE = 0, otherwise S and NS binaries assembled in one single image. 2: Two separated images for S and NS applications. */ #define MCUBOOT_S_DATA_IMAGE_NUMBER 0 #define MCUBOOT_NS_DATA_IMAGE_NUMBER 0This test works correctly.Test 2:(Swap mode enabled + separate Secure and Non-Secure applications)Project:OEMiROT_Appli_TrustZoneOEMiROT_Boot/* #define MCUBOOT_OVERWRITE_ONLY */ /* Undefined: FW installation uses swap mode. */ #define MCUBOOT_APP_IMAGE_NUMBER 2 #define MCUBOOT_S_DATA_IMAGE_NUMBER 0 #define MCUBOOT
good morning!Where can I get information about the datacode of such a chip ST1L05CPU33R?There is no information about the marking in the technical documentation.
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