Hello,
There is confusion regarding the EXTI_SRx bytes.
After a power on reset if a gpio (D0) is configured as input with interrupt and interrupts are enabled,
What is the state of the EXTI_SR1 and EXTI_SR2 bytes when the interrupt handler runs?
Do both SR1 and SR2 need to be cleared (written 1) to clear the interrupt?
It is my understanding that if D0 generates and interrupt EXTI_SR2_PDF will be set as well as EXTI_SR1_P0F. Is this correct?
What happens when two interrupts (eg: D0 and B2) happen at the same time? Will EXTI_SR2_PDF, EXTI_SR2_PBF, EXTI_SR1_P0F, and EXTI_SR1_P2F all be set?
