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STM8 Analog voltage stress

abelmeg2
Associate
Posted on March 23, 2010 at 12:49

STM8 Analog voltage stress

1 REPLY 1
will2
Associate II
Posted on May 17, 2011 at 15:07

I don't think your Vref- pin can be brought low enough to sample -1 VDC.  (spec sheet says Vref- min is = Vssa).  You may have to level shift your signal until your low end is 0 V, which would make your range 0 - 7 V.  The absolute max for Vref+ is = Vdd, which is 6.5 V, so it would seem like you would also need to scale down your signal using something as simple as a 2-resistor voltage divider.