STM32H5 workshop

@Laurids_PETERSEN Hello,

I am trying to implement the GPDMA on stm32H563zi as same that you did in stm32H5 workshop, but it is not working in my case.
I have made the same setup, and the configuration of .ioc file for standard request mode and Linked-List mode.

kindly please share and suggest updated document to follow along to implement the GPDMA on stm32H563zi peripherals in both standard request mode as well as Linked-List mode.

Regards.

Hello,

Thank you for your remark. Could you please share with me the setup (versions of the tools) you have used during your tests and which of GPDMA labs have you tested on your side (basic or Linked List), please?

We will check it on our side and provide you the solution.

Thank you

Hello @YM0 

Let me share with you the link to our additional materials related to STM32H5 workshop we have organized some time ago. You can find there the complete set of step-by-step examples with GPDMA in various modes.

STM32H5 step-by-step workshop 

I hope it helps.

Best Regards,

Hello,

Do you have a tutorial about implementing USB CDC without THREADX on the STM32H5 MCU?

I would like to implement it in a baremetal project?

Hello,

We have more examples on one of our Gihub repositories, but there is no video o those.

The one most useful for you could be the one created on STM32U5 platform:

https://github.com/ST-TOMAS-Examples-USB/U5_USBX_Device_CDC_ACM_Standalone

I hope it helps.

Best Regards,

Thanks you for the link @Artur IWANICKI 

Is there also a reference implementation using FreeRTOS?

The X-Nucleo-IKS0103 is discontinued. Do you have a suggestion for another expansion board with a component that supports i3c, for the i3c portion of the workshop?

Hello,

Thank you for sharing your example. I am also trying to use GPDMA to transfer data blocks via SPI with precise time slots. I repeated your example on the Nucleo H503RB and everything worked as expected.

As a first step, I just tried to address the “data” buffer on the SPI, but it doesn't work.

These are the lines of code I modified:

In main.c
ATOMIC_SET_BIT(hspi2.Instance->CFG1, SPI_CFG1_TXDMAEN);
__HAL_SPI_ENABLE(&hspi2);

in linkedlist.c
pNodeConfig.SrcAddress = (uint32_t)data;
pNodeConfig.DstAddress = (uint32_t)&(SPI2->TXDR); /* was (uint32_t)&(USART1->TDR) */

(The SPI2 configuration is not visible here, but I tested it by using the HAL and I see it working both with and without DMA).

Any suggestions are greatly appreciated. Thanks in advance, Flavio.

@fgiava There's some issues with the H5 startup code with DMA and SPI that is generated by CubeMX.

From what I've seen, the only configuration that works is when using 8-bit transfers. This avoids a bug where the transfer sizes (byte/halfword/word) are not filled in in the descriptors. Byte is encoded as zero, which happens to match the uninitialized descriptor, and the SPI is started. For halfword and word transfers, the size does not match the uninitialized zero, and the SPI start fails with HAL_ERROR.

I'm waiting on an assistance request (through my vendor) but it's been about 3 weeks and there are requests on this issue through these communities going back over 2 years.