2026-04-21 6:30 AM
Dear all I was setting up the RISAF4 for STM32MP257, however, the partition with name "linuxkernel2" has a glitch where its size shows as given
Which is beyond the size of my LDDR4 set to 8Gb.
How to solve it? A quick reply will be appreciated.
Thanking you!
With regards
Amit
2026-04-23 10:04 AM - edited 2026-04-23 10:12 AM
Hello @Amit_RS
Thank you for highlighting this issue on STCommunity.
Could you provide an IOC in order to investigate the issue?
KR, Souhaib
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2026-04-24 1:39 AM
Hello @Amit_RS ,
For information this problem was also reported by your local support and we are investigating it. Internal ticket number : CDM0062070
BR,
Kevin
2026-04-26 11:25 PM
There are actually two glitches :
the first one is what I reported. The second one is in RISAB 5 and 6. The same address appears both in RISAB 5 and 6 and hence might cause overlap of memories.
Moreover, I have a question that in EV1 device-tree there is no linuxkernel1 and 2 partition. below I have shown the generated device tree by cubeMX and the one from EV-1 Device Tree:
Generated:
linuxkernel1: linuxkernel1@84000000 {
reg = <0x0 0x84000000 0x0 0x76800000>;
no-map;
/* USER CODE BEGIN linuxkernel1 */
/* USER CODE END linuxkernel1 */
};
gpu_reserved: gpu-reserved@fa800000 {
reg = <0x0 0xfa800000 0x0 0x4000000>;
no-map;
/* USER CODE BEGIN gpu_reserved */
/* USER CODE END gpu_reserved */
};
ltdc_sec_layer: ltdc-sec-layer@fe800000 {
reg = <0x0 0xfe800000 0x0 0x800000>;
no-map;
/* USER CODE BEGIN ltdc_sec_layer */
/* USER CODE END ltdc_sec_layer */
};
ltdc_sec_rotation: ltdc-sec-rotation@ff000000 {
reg = <0x0 0xff000000 0x0 0x1000000>;
no-map;
/* USER CODE BEGIN ltdc_sec_rotation */
/* USER CODE END ltdc_sec_rotation */
};
linuxkernel2: linuxkernel2@100000000 {
reg = <0x00000001 0x00000000 0xffffffff 0x00000e89>;
no-map;
/* USER CODE BEGIN linuxkernel2 */
/* USER CODE END linuxkernel2 */
};
/* USER CODE BEGIN reserved-memory */
/* USER CODE END reserved-memory */
};
};
From EV1:
2026-04-27 1:40 AM
There is lot of confusion:
Also the following the EV-1 resmem code from EV-1 developer package:
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2022 - All Rights Reserved
* Author: Loic Pallardy loic.pallardy@foss.st.com for STMicroelectronics.
*/
/*
* STM32MP25 reserved memory device tree configuration
* Project : open
* Generated by XLmx tool version 2.2 - 7/4/2023 9:06:24 AM
*/
/ {
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* Internal RAM reserved memory declaration */
tfa_bl31: tfa-bl31@a000000 {
reg = <0x0 0xa000000 0x0 0x20000>;
no-map;
};
hpdma1_lli: hpdma1-lli@a020000 {
reg = <0x0 0xa020000 0x0 0xf0f0>;
no-map;
};
hpdma2_lli: hpdma2-lli@a02f0f0 {
reg = <0x0 0xa02f0f0 0x0 0xf0f0>;
no-map;
};
hpdma3_lli: hpdma3-lli@a03e1e0 {
reg = <0x0 0xa03e1e0 0x0 0x1e20>;
no-map;
};
bsec_mirror: bsec-mirror@a040000 {
reg = <0x0 0xa040000 0x0 0x1000>;
no-map;
};
scmi_cid2_s: scmi-cid2-s@a041000 {
reg = <0x0 0xa041000 0x0 0x1000>;
no-map;
};
scmi_cid2_ns: scmi-cid2-ns@a042000 {
reg = <0x0 0xa042000 0x0 0x1000>;
no-map;
};
cm33_sram1: cm33-sram1@a043000 {
reg = <0x0 0xa043000 0x0 0x1d000>;
no-map;
};
cm33_sram2: cm33-sram2@a060000 {
reg = <0x0 0xa060000 0x0 0x20000>;
no-map;
};
cm33_retram: cm33-retram@a080000 {
reg = <0x0 0xa080000 0x0 0x1f000>;
no-map;
};
ddr_param: ddr-param@a09f000 {
reg = <0x0 0xa09f000 0x0 0x1000>;
no-map;
};
cm0_cube_fw: cm0-cube-fw@200C0000 {
compatible = "shared-dma-pool";
reg = <0x0 0x200C0000 0x0 0x4000>;
no-map;
};
cm0_cube_data: cm0-cube-data@200C4000 {
compatible = "shared-dma-pool";
reg = <0x0 0x200C4000 0x0 0x2000>;
no-map;
};
ipc_shmem_2: ipc-shmem-2@200C6000{
compatible = "shared-dma-pool";
reg = <0x0 0x200C6000 0x0 0x2000>;
no-map;
};
/* Backup RAM reserved memory declaration */
bl31_lowpower: bl31-lowpower@42000000 {
reg = <0x0 0x42000000 0x0 0x1000>;
no-map;
};
tfm_its: tfm-its@42001000 {
reg = <0x0 0x42001000 0x0 0x1000>;
no-map;
};
/* Octo Memory Manager reserved memory declaration */
mm_ospi1: mm-ospi@60000000 {
reg = <0x0 0x60000000 0x0 0x10000000>;
no-map;
};
/* DDR reserved memory declaration */
tfm_code: tfm-code@80000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x80000000 0x0 0x100000>;
no-map;
};
cm33_cube_fw: cm33-cube-fw@80100000 {
compatible = "shared-dma-pool";
reg = <0x0 0x80100000 0x0 0x800000>;
no-map;
};
tfm_data: tfm-data@80900000 {
compatible = "shared-dma-pool";
reg = <0x0 0x80900000 0x0 0x100000>;
no-map;
};
cm33_cube_data: cm33-cube-data@80a00000 {
compatible = "shared-dma-pool";
reg = <0x0 0x80a00000 0x0 0x800000>;
no-map;
};
ipc_shmem_1: ipc-shmem-1@81200000 {
compatible = "shared-dma-pool";
reg = <0x0 0x81200000 0x0 0xf8000>;
no-map;
};
vdev0vring0: vdev0vring0@812f8000 {
compatible = "shared-dma-pool";
reg = <0x0 0x812f8000 0x0 0x1000>;
no-map;
};
vdev0vring1: vdev0vring1@812f9000 {
compatible = "shared-dma-pool";
reg = <0x0 0x812f9000 0x0 0x1000>;
no-map;
};
vdev0buffer: vdev0buffer@812fa000 {
compatible = "shared-dma-pool";
reg = <0x0 0x812fa000 0x0 0x6000>;
no-map;
};
spare1: spare1@81300000 {
reg = <0x0 0x81300000 0x0 0xcc0000>;
no-map;
};
bl31_context: bl31-context@81fc0000 {
reg = <0x0 0x81fc0000 0x0 0x40000>;
no-map;
};
op_tee: op-tee@82000000 {
reg = <0x0 0x82000000 0x0 0x2000000>;
no-map;
};
gpu_reserved: gpu-reserved@fa800000 {
reg = <0x0 0xfa800000 0x0 0x4000000>;
no-map;
};
ltdc_sec_layer: ltdc-sec-layer@fe800000 {
reg = <0x0 0xfe800000 0x0 0x800000>;
no-map;
};
ltdc_sec_rotation: ltdc-sec-rotation@ff000000 {
reg = <0x0 0xff000000 0x0 0x1000000>;
no-map;
};
/* global autoconfigured region for contiguous allocations */
linux,cma {
compatible = "shared-dma-pool";
reusable;
alloc-ranges = <0 0x80000000 0 0x80000000>;
size = <0x0 0x8000000>;
alignment = <0x0 0x2000>;
linux,cma-default;
};
};
};
and here I find lot difference than the generated code which confuses me. This also doesn't match the github code. Which one to follow?
Please answer to this as quickly as possible. Its urgent.
regards
Amit
2026-05-01 1:15 AM
@Amit_RS @Kevin HUBER @Souhaib MAZHOUD
I can confirm that I having the same issue.