2014-11-24 01:56 AM
Hi,
My application wakes-up from Stop Mode every 100mSec, takes ADC conversion from two channels in Scan mode to DMA then makes some processing. I get roughly +1.5% error. When i disable the Stop Mode but sampling remain in 100mSec intervals, the result seems correct. If i add 2mSec delay after Wakeup, then also the results seems correct. I left the Vref module ON (PWR_UltraLowPowerCmd(DISABLE) to eliminate the 3mSec stabilization time when turning it ON, but this did not solve my problem. Any ideas please ?2014-11-27 07:58 AM
Hi,
I have the problem is related with hardware problem: On every Wakeup from Stop, there is a short voltage glitch on Vdd and Vdda (digital and analog supply pins), but no glitch on the sampled analog inputs. So this is causing the error. the solution would be to read the Vref on AN17 (VREFINT_DATA) and compare it with the factory calibrated Vref value (VREFINT_CAL). Not tested it yet.2014-11-27 08:04 AM
On every Wakeup from Stop, there is a short voltage glitch on Vdd and Vdda (digital and analog supply pins), ...
This may be related to your power supply circuitry, and it's control characteristics. Larger buffer capacitors might help to mitigate the glitch, too.
2014-12-01 03:21 AM