Posted on July 25, 2013 at 09:25Hello all,
I am using the stm32l1xx.h file V1.1.1 released on 09-March-2012.
In the header file, STM32L specific Interrupt Numbers for medium+ density devices are defined as follows,
#ifdef STM32L1XX_MDP
TIM7_IRQn = 44, /*!< TIM7 global Interrupt */
TIM5_IRQn = 46, /*!< TIM5 global Interrupt */
SPI3_IRQn = 47, /*!< SPI3 global Interrupt */
DMA2_Channel1_IRQn = 50, /*!< DMA2 Channel 1 global Interrupt */
DMA2_Channel2_IRQn = 51, /*!< DMA2 Channel 2 global Interrupt*/
DMA2_Channel3_IRQn = 52, /*!< DMA2 Channel 3 global Interrupt*/
DMA2_Channel4_IRQn = 53, /*!< DMA2 Channel 4 global Interrupt*/
DMA2_Channel5_IRQn = 54, /*!< DMA2 Channel 5 global Interrupt */
AES_IRQn = 55, /*!< AES global Interrupt */
COMP_ACQ_IRQn = 56 /*!< Comparator Channel Acquisition global Interrupt*/
#endif
But according to data sheet DocID15965 Rev 8, Table 36 on Page 193 interrupt channels are positioned as below.
44 - TIM7 global interrupt
45 - TIM5 Global interrupt
46 - SPI3 Global interrupt
47 - DMA2 Channel 1 interrupt
48 - DMA2 Channel 2 interrupt
49 - DMA2 Channel 3 interrupt
50 - DMA2 Channel 4 interrupt
51 - DMA2 Channel 5 interrupt
52 - AES global interrupt
53 - Comparator Channel Acquisition Interrupt
So there is some mismatching in the provided stm32l1xx.h header file. Has anybody come across this point earlier?
Regards,
Anuradha
