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coetzeec
coetzeec
Associate II
November 2, 2014
Question

STM32 ADC_DR register construct

  • November 2, 2014
  • 3 replies
  • 1027 views
Posted on November 02, 2014 at 20:43

HI ,

I am reading through some of the data sheet of the STM32F101CB  on the ADC , The adc is 12bit SAR . If it is right aligned does this mean that bits 11-15 is the sign bits , bit4-10 the digital value and bits0-3 the decimal value as with DS18B20?

Or is the whole register value the binary or 2's complement of the read value with the MSB of the register the sign bit (provided its 2's  compliment)?

Does anyone have Idea?

regards
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    3 replies

    Tesla DeLorean
    Tesla DeLorean
    Guru
    November 2, 2014
    Posted on November 02, 2014 at 20:56

    The measurement is NOT signed, it has a value 0-4095, where +VREF is 4095

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    coetzeec
    coetzeecAuthor
    Associate II
    November 4, 2014
    Posted on November 04, 2014 at 17:30

    Hi Clive,

    Thank you for the feedback, just wondering about something else. With this processor the full 12bit range is applicable. Am i correct in saying in higher end processors IE STM32f103ZE where the -vref is available and a negative voltage is applied that the full range is split in half ie 2048 instead of the 4096?

    regards

    Tesla DeLorean
    Tesla DeLorean
    Guru
    November 4, 2014
    Posted on November 04, 2014 at 18:06

    Not sure you're going to get it negative, VDDA >= +VREF (per data sheet), +VREF between 2.4 and 3.6V, and I'd assume -VREF >= VSSA, but don't have an immediate cite for that.

    VAIN has a minimum of ''0 (VSSA or VREF tied to ground)'' to a maximum of +VREF

    So either you're going to have to condition your signal externally, or use an external ADC that meets your requirements.
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