2013-01-25 08:28 AM
I have spent a lot of time with the manuals for the stm32f4, but have had no luck finding the information I need regarding how long it takes to execute certain instructions. I assume add, takes maybe two CPU cycles. Moving from one register to another must take only a few cycles too, but on the st10 I was working with before multiply took ten times longer than add and division took 15 times longer. I really need to do square roots, too, so I need to know how long that instruction is going to take to execute.
Have you come across this information in the manuals? Could you give me a citation? How long do the different instructions take to execute? #instruction-time-cpu-cycle-sqrt2013-01-25 08:45 AM
Hi,
It's ARM you need to get the info from: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0439b/CHDDIGAC.html Cheers, Martin. PS square root of float is quoted as 14 cycles.2013-01-25 08:47 AM
The instruction execution times would be the domain of the ARM documentation.
The process is also pipelined, so there is latency vs through put considerations. Most register base instructions are going to be single cycle in terms of entering the pipeline. The divide has a 10-12 cycle latency. Where you get implementation specific behaviour is load/store and the buses it has to transact across. You will also need to consider the write buffer, and prefetch, and the interaction with the ART cache in front of the FLASH. You should use the core cycle counter in the Trace Unit (DWT_CYCCNT) to benchmark the throughput of your code, with your system configuration.2013-01-25 08:57 AM
You have provided a great resource to me. where did you find the squareroot 14 cycle thing? Is the floating point processor ARM too?
2013-01-25 09:19 AM
A quick google for the cortex-m4 sqrt offers some cycle speeds
http://www.arm.com/files/pdf/dspconceptsm4presentation.pdf
The FPU attached to the M4 (M4F) is an ARM design2013-01-25 09:35 AM
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Hi,
This is the PDF version: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0439b/DDI0439B_cortex_m4_r0p0_trm.pdf Section 7-5 (FPU section), VSQRT.F32. Cheers, Martin.