Should I add an RC filter to the analog input pin (STM32F103 ADC) for a triac light dimmer application?

[haraves]

I'm designing a custom PCB using an STM32F103 microcontroller to control a triac-based light dimmer. The firing angle for the triac is determined by reading the voltage from the potentiometer.

The potentiometer output is routed through a header and then directly to an analog input pin (PA0) of the STM32, which uses the built-in ADC to read the value. For power supply filtering, I'm using an LC network to separate the analog supply (VDDA) from the digital supply (VDD), with the usual decoupling capacitors.

This project is part of my effort to learn how to build custom PCBs and improve my practical electronics design skills.

My main question:

Should I add an RC low-pass filter right at the analog input pin (PA0) for improved ADC readings?

1. The potentiometer wires might be picking up noise.
2. I want smooth, stable ADC readings to avoid flicker or erratic dimming.
3. Does the STM32 ADC have any internal filtering/signal conditioning?
4. If I should add an RC filter, what typical resistor and capacitor values do you recommend for this application?
5. Any suggestions for good PCB layout practices for analog signals?

[Hal3]

If my memory is right, the F103 doesn't provide filtering.

The triac already provides an "R" for an RC filter, adding a cap to ground can work well and will keep noise out of the F103. Size the cap for the RC you need.

A software filter is a minimum hardware solution. Average a number of samples, or code a digital low pass RC filter.

I leave it up to you to figure out the R and C.

[gregstm]

Some thoughts.

If it is a double sided board, use the bottom layer as a ground plane and do all the routing on the top layer (using surface mount components). Allow for a 603 size resistor and capacitor near the input pin, that way you can experiment with values later, but any resistor value should be low (< 1K?) to avoid upsetting the ADC. I often just use a surface mount ferrite bead with a small value capacitor to block EMI. I would do minimal analog filtering and let the software do most of the filtering work (average samples). Potentiometers will eventually start failing (dropouts, dirt) so maybe you can anticipate that in your software (or use an optical device?) 

For more challenging analog designs, I often use a low noise linear regulator (with a shutdown pin)  to supply the analog section.

The following document ("PCB Design Guidelines For Reduced EMI") helped me a lot when I started designing PCBs  - https://www.ti.com/lit/an/szza009/szza009.pdf

[AScha.3]

Separation of analog VDD with inductor is not needed and often produces more problems (resonance) than it's improving anything.

And for the potentiometer input: just put a 100nF very.cap close to the CPU PIN to GND. That's it.