automatic state saving & restoring while handling interrupts

Posted on May 17, 2011 at 12:21

Hi,

I am also working on a problem concerning interrupt handling right now. I found out that if you clear the Interupt-Pending Register within the last instruction of the ISR (just before the jump BX lr) then this bit clear is not recognized and another ISR is started just after finishing the first one!! (--> tail chaining)

To understand this problem I checked the stacking procedure on entry to the ISR in the technical reference manual: Only 8! registers are pushed by hardware! These are: R0-R3, R12, PC, XPSR, LR. If your ISR uses other registers the programmer is responsible for pushing them onto the stack.

Maybe this fact helps you in your case.

Regards

Andy

Posted on May 17, 2011 at 12:21

While handling interrupt in Cortex-M3(STM32F101VB) I have problem with automatic state saving & restoring while handling interrupt. I noticed that all registers(R0 - R12) are automatically saved & restored as written in Cortex technical reference manual. But While running code it jumps to HardFault Handler or MemManage Handler or works abnormally for different applications.

When I am performing these operations by writing small piece of code for state saving & restoring all codes works fine.

Then where is the problem? My stack size is 1024 bytes. Is this not enough?