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After Restart, Delay time decrease

piyushsurani
Associate

code running ok with 1 second delay in stm32f103c8t6 bluepill board. but, after power off when i do power on, delay is 0.56 second. I am using 72 MHz timer2 clock.

 

#include "stm32f1xx.h"
 
void TIM2_Init_ms(uint16_t delay_ms);
void clock_setup();
 
int main(void)
{
clock_setup();
    TIM2_Init_ms(1000);
while(1)
{}
}
 void TIM2_IRQHandler(void)
 {
     if (TIM2->SR & TIM_SR_UIF)
            {
                TIM2->SR &= ~TIM_SR_UIF;   // Clear update flag
                GPIOC->ODR ^= GPIO_ODR_ODR13;     // set and reset Bit 13 of ODR //togglr bit and so LED
            }
 }
 
 
void TIM2_Init_ms(uint16_t delay_ms)
{
    RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
 
    TIM2->PSC = 7199;              // 0.1 ms tick
    TIM2->ARR = (delay_ms * 10) - 1;
    TIM2->EGR |= TIM_EGR_UG;           // Load PSC + ARR
    TIM2->CNT = 0;                     // RESET counter (IMPORTANT)
    TIM2->DIER |= TIM_DIER_UIE;
    NVIC_EnableIRQ(TIM2_IRQn);
    TIM2->CR1 |= TIM_CR1_CEN;
}
 
void clock_setup()
{
//Clock Setting
    RCC->CR |= RCC_CR_HSEON; //bit 16 (High Speed External Clock ) ON of Clock Control Register
    while (!(RCC->CR & RCC_CR_HSERDY)); // wait till external oscillator stable
 
    //Flash Access
    FLASH->ACR |= FLASH_ACR_LATENCY_2; // 2 wait cycle of CPU required for 72MHZ frequency to access flash
    FLASH->ACR |= FLASH_ACR_PRFTBE; //to prefetch data from flash when cpu access other data
 
    // PLL Setup
    RCC->CFGR |= RCC_CFGR_PLLSRC;         // PLL source from external oscillator
    RCC->CFGR |= RCC_CFGR_PLLMULL9;       // PLL Multiply with 9 to get 72MHZ Clock
 
    // APB1 Setup
    RCC->CFGR |= RCC_CFGR_PPRE1_DIV2; //set apb1 prescaler 2 to get max 36 MHZ
 
    // Enable PLL
    RCC->CR |= RCC_CR_PLLON; //start PLL
    while (!(RCC->CR & RCC_CR_PLLRDY)); //wait till PLL Frequency stable
 
 
    RCC->CFGR |= RCC_CFGR_SW_PLL; //PLL configure as system clock
    while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL); //wait till system clock = PLL
 
    RCC->APB2ENR |= RCC_APB2ENR_IOPCEN;//GPIO PORTC clock enable
 
    GPIOC->CRH &= ~(GPIO_CRH_MODE13 | GPIO_CRH_CNF13); // clear port 13 old setting
    GPIOC->CRH |=  GPIO_CRH_MODE13_1;     // Port13 2Mz Push pull output set
}
3 REPLIES 3
TDK
Super User

How do you measure the delay? Your code has no effect on anything. Ahh, it toggles a pin. 72 MHz * .56 = 40 MHz. Not the default speed, so who knows.

Most likely this is a counterfeit chip so any documents from ST which says how it operates are not relevant.

If you feel a post has answered your question, please click "Accept as Solution".

It is countetfeit chip. But, problem was in setup of PLL Clock. We need to reset old PLL multiplication factor before assign it new. 


@piyushsurani wrote:

It is countetfeit chip. 


For a counterfeit chips you need to ask their manufacturer(s).

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.