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AR Timer in the ST7LITE0

info73
Associate
Posted on February 15, 2005 at 07:49

AR Timer in the ST7LITE0

1 REPLY 1
info73
Associate
Posted on February 15, 2005 at 07:49

I have several problems using the Auto Reload Timer (ART) of the ST7LITE05B.

Object:

The µC must load several values of time in the ART (e. g. one time 5ms, an other time 10ms, etc. in different parts of my program) and must produce an interrupt at the and of each timing using output compare mode.

Problems:

1) When I use the SIM of STMicroelectronics (ST7 Visual Develope, Vesion 3.1.1) the timer works perfectly, the timing is correct, the interrupts is correctly generated, but only when the µC starts the first time the ART (for the next time see item 2). When I use the same program with the In circuit debugger of Softec (hardware in-DART-STX with software in-DART-STX v. 2.05 based on STVD 2.5.4) the ART doesn't works correctly and doesn't produce the interrupts.

2) I can't clear the CNTR registers. So, if for example the first timing is 6ms and I charge the the DCRO registers with DCROL=6 and DCROH=0, when the CNTR match the DCRO registers the interrupt is genetated. If subsequently I want to obtain the interrupt after a timing of 8ms, I charge the DCROL register with DCROL=6+8=14, because I don't know how clear the CNTR registers (now the DCROL registers has the value of 6 from previously timing).

3) If I continue adding in the DCRO registers, may be the DCRO registers go in overflow and match the value 0. In this case the ART doestn't works because the value in the DCRO registers must be different from 0.

Question:

How can I use the ART timer to obtain different timing in my program?

My program code (Fcpu=8MHz):

INIT ld a, #%00000000

ld MCCSR,a ; MCO clock disable, fcpu=fosc

ld a,$FFDE

ld RCCR,a

ld a,#%00000100

ld PADDR,a

ld a,#%10011100 ; PA3,4,7 pullup push button

ld PAOR,a ; PA0 interrupt

ld a,#%00000000

ld PADR,a

ld a,#%00001111 ; PB0,1,2,3 output push-pull

ld PBDDR,a

ld a,#%00001111

ld PBOR,a

ld a,#%00000010

ld PBDR,a

ld a,#%00000001

ld EICR,a ; Interrupt of PA0 (ei0)

clr PWMCR ; Output compare mode

rsp

................

MNP ld a,#%00000000 ; Output compare mode

ld PWMCR,a

bset ATCSR,#0 ; Interrupt timer

ld A,#$00

ld DCR0H,a

ld A,#$06

ld DCR0L,a

rim ; Enable interrupt

bset ATCSR,#3 ; Fcounter = FLite = 1KHz

wfi

...............

.artim_oc_rt

ld a,PWM0CSR ; Clear CMPF0

bres ATCSR,#3

iret

Thanks for helping.

Paolo