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Asynchronous SPI Slave Mode on SPC572L64E3

JLand.16
Associate

Has anyone had any luck setting up the SPC572L64E3 to run in Asynchronous SPI Slave Mode? I need interrupts to trigger for chip select assert/deassert, tx word push and rx word pull. I've tried using the TFFF and RFDF ISRs but it seems that the TFFF ISR will trigger several times before a word is ever transmitted, and several words will be transmitted before RFDF is triggered.

1 ACCEPTED SOLUTION

Accepted Solutions
zambrano.luigi
Senior III

Hi, in order to configure and manage the DSPI, I suggest you to download SPC5Studio from the ST web site. It is a free of charge tool developed by ST, that includes for each platform a set of drivers (DSPI is one of them). The tool allows you to graphically configure the driver parameters and to generate a C project based on the driver configuration set by the graphic interface. Moreover, the tool also contains a set of test applications (examples) that show you howto configure and use the drivers.

Regards,

Luigi

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2 REPLIES 2
zambrano.luigi
Senior III

Hi, in order to configure and manage the DSPI, I suggest you to download SPC5Studio from the ST web site. It is a free of charge tool developed by ST, that includes for each platform a set of drivers (DSPI is one of them). The tool allows you to graphically configure the driver parameters and to generate a C project based on the driver configuration set by the graphic interface. Moreover, the tool also contains a set of test applications (examples) that show you howto configure and use the drivers.

Regards,

Luigi

JLand.16
Associate

Hi Luigi,

I am currently using SPC5Studio to develop my project. The SPI low level drivers generated by the GUI do not include hooks for the tx push, rx pull, or chip select assert interrupts. I had to patch the generated code to get these interrupts and even then it reacts very slowly to the SPI bus master. The only way that I have gotten it to work in my project thus far is on the SPI bus master asserting the chip select and waiting for several milliseconds before transmitting a word, and then deasserting the chipselect between each word.