STM32 MPUs Products and hardware related

I am familiar with the STM32 MCU:s and now I try to learn some around the Linux MPU:s.I am looking for a simple pheripheral application example on how to control e.g some GPIO:s from inside Linux using the STM32CubeMX and STM32CubeIDE.Any hints?Thanks 

I am using the STM32MP157x-DK2 discovery board and building the qt-example image.During boot the ST splash screen is displayed on the LCD as things get underway. I replaced the .bmp with one of my own , horizontally oriented, and it was presented portrait style. I changed the orientation and it still rotated to portrait. If I am reading things correctly it appears that the format of the bmp is incorrect as importing the original bmp into a tool like photoshop and resaving it destroys it and it is no longer displayed. I am also convinced that the OS is setting the display into a 480x800 portrat mode rather than 800x480 landscape and for the life of me I can't find how to change this.Is there a description of how the thread of drivers and configs go together to allow me to set the orientation?My application also uses a QT based web display which sees the LCD as portrait ( I want landscape ) so it must be right at the bare metal level that my build is 'wrong'.   

Hi,I have working on STM32MP157C-DK2 Board and after application of 8KV ESD strike on USB Shield, the DSI Screen Goes off completely (Discharging on Ground only). To verify the issue I have applied the same strike on a custom board consisting of STM32MP157CAC3 and SN65DSI83 to display video out. Same thing happening. After little bit of probing I found that DSI clock is working fine and Data lines are also toggling but there are lots of EOT,ECC errors.In this case if I set the MPU to sleep mode using command " echo mem /sys/power/state " and then wake using PMIC Wake Key Press then the DSI signal again start working perfectly and ECC and EOT error goes off. What could be the reason for this behavior? How can I solve this. We are waiting for mass production of our device just because of this issue as the ESD testing is failing.Kindly help us solving this issue.Kernel : 5.10.10Yocto Build : Dunfell 

Hi,I have an stm32mp157d-dk1 board, for which I am building the core-image-minimal image within the poky (Dunfell) distribution. Other than adding the "meta-st-stm32mp" layer I have not made any ST related customisations.I am trying to launch a custom elf file from the bootloader, following section 3.2.1 of the guide: How to start the coprocessor from the bootloader I am running into a few issues:1. If I simply modify CONFIG_EXTRA_ENV_SETTINGS as suggested I cannot flash the SD card:That is, if I modify CONFIG_EXTRA_ENV_SETTINGS so that it becomes (I added some additional print-out, that I do not believe is causing my situation): #define CONFIG_EXTRA_ENV_SETTINGS \ "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" \ "kernel_addr_r=0xc2000000\0" \ "fdt_addr_r=0xc4000000\0" \ "fdtoverlay_addr_r=0xc4100000\0" \ "scriptaddr=0xc4100000\0" \ "pxefile_addr_r=0xc4200000\0" \ "splashimage=0xc4300000\0" \ "ramdisk_addr_r=0xc4400000\0" \ "altbootcmd

HelloIn the new version of Yocto release mickedore, SIGN_TOOL variable needs to be specified to sign TF-A binary which should corresponds to STM32CubeProgrammer signing tool https://wiki.st.com/stm32mpu/wiki/Signing_toolPractically, how can we set the the variable to the STM32CubeProgrammer signing tool? Is there a Yocto recipe native that include this tool?https://github.com/STMicroelectronics/meta-st-stm32mp/blob/mickledore/recipes-bsp/trusted-firmware-a/tf-a-stm32mp.inc#L296Thanks 

Hi,I bought two same board and use one to test.After upgrade stlinux on this testing board, the cpu it can recognize is only one when the other one can recognize it two.could you give me a guide to fix it and why this happened?Thanks.

I have a custom board with a stm32mp151c and 256M DRAM.Trying to get optee 3.12 from ecosystem 3.0.0 to start.Everything works fine with tf-a 2.4-r1 and sp_min, u-boot 2020.10 etc.But I can't get optee to start. I've enabled a high loglevel and the last print I get from optee is:...I/TC: Pager is enabled. Hashes: 2208 bytesThen everything goes quiet. No stacktrace, fault, or anything else. Just "dead".To me, this looks like some very basic issue with DRAM sizes etc. But I can't say for sure.My dts looks correct with memory regions and declarations.But I noticed that in the build conf.mk was getting some weird stuff.CFG_DRAM_SIZECFG_SHMEM_STARTCFG_TZDRAM_STARTThese three had some wonky values for a 256M board. And they seem to be used?So my conclusion is that it does not suffice to set dts properties for optee, some tweaking of platform memory sizes (looks like there are options for 512M 1G etc, but not 256M) needs to be done.Anything else that needs to be fixed for a 256M board?Maybe t

When porting applications from single core M4's equipped with FLASH, the RAM associated with M4 in MP1 is supposed to cater for both RAM and former FLASH needs. It won't fit. How to overcome this if M4 code/data size cannot be reduced?

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Hello,I am in process of designing my own STM32MP1 powered device. I was wondering if I can use STLINK-V3MODS as a drop in replacement for ST-LINK/V2-1 in STM32MP157-EVAL reference design. I need the Virtual COM interface embedded in device.-Mark

I want to emulate the stm32mp157 on qemu. I have been taking the kernel image and initrd from yocto build, but it is not loading the kernel. using the following commandqemu-system-arm \-M virt -smp 8,sockets=1,cores=4,threads=2 -m 4G \-cpu cortex-a7 \-device virtio-tablet-pci \-device virtio-keyboard-pci \-device virtio-net-pci,netdev=net0,mac=52:54:00:12:34:02 \-device virtio-gpu-pci \-device virtio-rng-pci,rng=rng0 \-netdev tap,id=net0,ifname=$TAP,script=no,downscript=no \-object rng-random,filename=/dev/urandom,id=rng0 \-serial mon:stdio -serial null -nographic \-initrd senecos-image-stm32mp1-ems-c2-faa1-20230803140050.rootfs.cpio.gz \-kernel Image \-append 'root=/dev/ram0 rw debugshell ip=192.168.7.2::192.168.7.1:255.255.255.0::eth0:off:8.8.8.8 console=ttyAMA0 console=hvc0 '

Hello,I would like to ask you few questions since I have some unclearances about STM32MP157F MPU:1. If 933MHz DDR3L RAM was connected to the MPU according to the schematic, will the MPU automatically underclock it to max 533MHz?2. Is it possible to connect an OLED display to the STM32MP157F?3. Since SLC NAND memories are quite expensive in higher densities (>= 16GB), would it be a problem if a different configuration  such as TLC was used? Does the cell configuration also matter in e.MMC and what is its max data transfer rate for read/write when connected to SDMMC, if the datasheet says max I/O speed is 208 MB/s? Would it be possible to use HS200 mode to take advantage of the maximum capabilities of the MPU?4. If the Wi-Fi + Bluetooth module has a Wi-Fi SDIO host interface and as stated , the SDMMC supports data rates up to 208 MB/s, would it be possible to use the Wi-Fi 5/6 module to also take advantage of the MPU maximum capabilities instead of the Wi-Fi 4 65Mb/s (8,125MB/s)

Recently I got a problem with RPMSG driver when M5 coprocessor restarts. Thanks to https://community.st.com/s/question/0D53W00000936uRSAQ/kernel-panic-with-pollselect-syscalls-on-virtual-uart-devices-to-m4-core-when-m4-watchdog-restarts?t=1632144260162the problem is over.Now I get the same problem with RPMSG SDB driver (see attachment). Can you help me ?

I am working on yocto project. I started with a custom board based on stm32mp157. You can find the board description in this link custom board. Vendor has a board support package in dunfell version. But I am doing my project in kirkstone version. I have choosen my distribution packgae from the openstlinuxdistribution. I have following build configuration for creating the image:Build Configuration: BB_VERSION = "2.0.0" BUILD_SYS = "x86_64-linux" NATIVELSBSTRING = "universal" TARGET_SYS = "arm-emt_eglfs-linux-gnueabi" MACHINE = "emsbc-argon" DISTRO = "emt-eglfs" DISTRO_VERSION = "1.3" TUNE_FEATURES = "arm vfp cortexa7 neon vfpv4 thumb callconvention-hard" TARGET_FPU = "hard" DISTRO_CODENAME = "kirkstone" ACCEPT_EULA_emsbc-argon = "1" GCCVERSION = "11.%" PREFERRED_PROVIDER_virtual/kernel = "linux-stm32mp-argon" meta-emtrion-emsbc-argon meta-emtrion = "<unknown>:<unknown>" meta = "HEAD:f7766da462905ec67bf549d46b8017be36cd5b2a" meta-oe meta-initramfs meta-multimedia me

Hi,I'm having some difficulty routing 1GB DDR3L memory with the STM32MP151DAC1. Both reference boards available for this product use different memory or pitch configurations. I found an Application Note, AN5122, that guides through memory routing, but I would like some actual reference design example, to compare. There are any reference, ap notes, or anything to help with this?Regards,Arion Doneda

Hi,I find the 'STM32MP1_SeriesDDRmemory_routing_guidelines_layout_examples_V3.0' from ST's site.I've several questions: It seems the column 'STM32MP15XXAA LENGTH (mm)' is the package delay per pin, right?Actually, the delay is a time factor. But here the delay is given in 'mm', then what's the propagation speed ST used?Can you provide delays in ps? Or can I get the delays from the IBIS file?Thanks.

Hi,Are there any references for configuring the I2S supply voltages in device trees for STM32MP135-DK.From the I2S module currently we are getting the output level as 5V, is that expected or is there any way to change that from 5V to 3.3V.

Hi,After reading the document I understand the interrupts are handled by pin#, and we set GPIOsel within EXTI_ConfigTypeDef.My question is how do we determine which port generates the interrupt?Suppose I use PA0 and PB0, and I only want to use one callback function for them.void callback(){ if(port == GPIOA) { do something } else if(port == GPIOB) { do other thing }}Thank you

Hello!I am using the CortexM4 coprocesor on the STM32MP157F-DK2 to measure multiple ADC channels and update a control loop based on the values. I have set up ADC1 using the DMA2 in circular mode to read channels IN1, IN2, and IN4. I have a buffer set up in which I place the values of the ADC. I also have a timer running so that upon the timer event, the ADC conversion is trigger. ADC1 is set up so that IN1, IN2, and IN4 have rank 1, rank2, and rank3 respectively. The problem I am facing is that each time I restart the DMA(firmware restart), it changes the index of the DMA buffer for each ADC channel. So for example, during testing, I have IN1 connected to 3.3V, IN2 connected to 0V and IN4 connected to 1.65V.The first time I stop the DMA and read the buffer I see these values.This makes sense because the first channel should be highest, second channel should be around 0, and third channel should be about half the first channel. However, after running my code and stop/start the DMA multi

Hi Community,I realise that this may be a very newbie question:I have run all the steps as seen on the Wiki,I followed these steps to the letter: https://wiki.st.com/stm32mpu/wiki/PC_prerequisitesFolowed by:mkdir -p st/buildcd st/buildrepo init -u https://github.com/STMicroelectronics/oe-manifest.git -b refs/tags/openstlinux-6.1-yocto-mickledore-mp1-v23.06.21repo sync DISTRO=openstlinux-weston MACHINE=stm32mp15-disco source layers/meta-st/scripts/envsetup.shbitbake st-example-image-qtwaylandAll these steps were completed successfully :heavy_check_mark:I'm looking at the tmp-glibc/deploy/images/stm32mp15-disco/ directory and I am unable to figure out which of these I need to flash on to the SD card using etcher on my PC.Could someone help point me in the right direction?Thanks,

Hi,I'm searching any information about how exclusive access (LDREX / STREX instructions) is implemented in STM32MP157 silicon. Unfortunately, it seems that ST assumes that this information is obvious.Based on ARM documentation, the synchronization is either provided by the SCU or the memory shall be marked Shareable (see https://developer.arm.com/documentation/dht0008/a/arm-synchronization-primitives/exclusive-accesses/use-in-multi-core-systems).Based on the STM32MP157 datasheet, figure 1: the SCU unit is part of the Level-2 cache connected to the dual-A7. However, the M4 core is on another bus. So I suppose that the SCU will not ensure A7 <-> M4 exclusive access.The other option is Sharable memory. So the question is: is functionality of ldrex/strex instructions between A7 and M4 cores guaranteed when the memory is marked as Shareable in MMU / MPU?Based on another articles, the behavior of Sharable memory depends on implementation of bus, bus interconnec

Greetings,  I have a few STM32MP1 boards. One of which I have configures the OS on, and custom applications.I copied the SD card and put it in another one.  The MAC address is the same. I read an STM article about the MAC address and "fuse sense 0 57 2" shows me the correct MAC address.  So it must be in software somewhere.  Where?

I built my image to test flutter gallery application from meta-flutter/workflows/stm32mp15. My local.conf file can be seen below:ACCEPT_EULA_stm32mp15-disco = "1" IMAGE_LINGUAS = "en-us" TOOLCHAIN_HOST_TASK:append = " nativesdk-flutter-sdk" CLANGSDK = "1" DISTRO_FEATURES:remove = " x11 " PACKAGECONFIG:pn-flutter-auto-runtimerelease = "backend-egl mouse-cursor package-info secure-storage text-input texture-test-egl" IMAGE_INSTALL:remove = " packagegroup-st-demo " IMAGE_INSTALL:remove = " gtk+3-demo " IMAGE_ROOTFS_MAXSIZE = "3145728" IMAGE_INSTALL:append = " flutter-auto-runtimerelease flutter-engine-runtimerelease-sdk-dev flutter-gallery-runtimerelease flutter-test-video-player-runtimerelease adwaita-icon-theme-cursors xdg-user-dirs avahi-daemon ntp ntp-tickadj gstreamer1.0-libav gstreamer1.0-plugins-bad gstreamer1.0-plugins-good gstreamer1.0-plugins-ugly" LICENSE_FLAGS_ACCEPTED += " commercial" I flashed the image and in the home/root path there is a README file it says:Check GPU =====

Hi,We are currently working on a project that involves utilizing the STM32MP13X MPU. Our device operates in both ACM and Mass Storage Mode, and we would like to inquire about the process of obtaining a custom name for the virtual serial COM port generated by the STM32MP13X when connected via USB.Specifically, we would like to understand the steps involved in acquiring a custom name for the virtual serial COM port and also a new product ID. We got know that ST offers sub-licensing for this instead of getting a vendor ID from usb.orgAny guidance on how we can get a distinct name? We aim to have a distinct name for our COM port to enhance the user experience and differentiate our product in the market.

Hi,I like to use spidev_test tool:https://wiki.st.com/stm32mpu/wiki/How_to_use_SPI_from_Linux_userland_with_spidev#Installation_on_your_targetI am following this guide for compiling the tool by developer package:https://wiki.st.com/stm32mpu/wiki/How_to_build_Linux_kernel_user_space_toolsThese are commands I have used: cd ~/Distribution-Package/openstlinux-5.10-dunfell-mp1-21-03-31/build-openstlinuxweston-stm32mp157a-visionsom-hdmi-emmc-mx/tmp-glibc/deploy/sdk ./st-image-weston-openstlinux-weston-stm32mp157a-visionsom-hdmi-emmc-mx-x86_64-toolchain-3.1-snapshot.sh . /opt/st/stm32mp157a-visionsom-hdmi-emmc-mx/3.1-snapshot/environment-setup-cortexa7t2hf-neon-vfpv4-ostl-linux-gnueabi cd ~/Developer-Package tar xfJ en.SOURCES-stm32mp1-openstlinux-5.10-dunfell-mp1-21-11-17_tar.xz cd stm32mp1-openstlinux-5.10-dunfell-mp1-21-11-17/sources/arm-ostl-linux-gnueabi/linux-stm32mp-5.10.61-stm32mp-r2-r0 tar xfJ linux-5.10.61.tar.xz cd linux-5.10.61 for p in `ls -1 ../*.patch`; do patch -