STM32 MPUs Products and hardware related

I am setting up the fd-can protocol on stm32mp1, please let me know after creating the dts file from stm32mx , how to transfer that file to stm32mp1 to use, do I use the command root@stm32mp1:~# ls / sys/class/netend0 lo usb0 , it doesn't show that there is can0 , and I have another questionwhen I type like this there is flexcan , does it have any effect?root@stm32mp1:~# lsmodModule Size Used byflexcan 32768 0cfg80211 663552 0usb_f_ncm 24576 2u_ether 20480 1 usb_f_ncmlibcomposite 49152 10 usb_f_ncmstm32_adc 36864 0stm32_timer_trigger 20480 1 stm32_adcstm32_lptimer_trigger 16384 1 stm32_adcsnd_soc_stm32_sai_sub 28672 8snd_soc_audio_graph_card 16384 2snd_soc_simple_card_utils 20480 1 snd_soc_audio_graph_cardstusb160x 16384 0stm32_adc_core 20480 0stm32_hash 32768 0crypto_engine 16384 1 stm32_hashtypec 45056 1 stub160xstm32_vrefbuf 16384 1snd_soc_hdmi_codec 16384 1snd_soc_cs42l51_i2c 16384 1snd_soc_cs42l51 24576 1 snd_soc_cs42l51_i2csnd_soc_stm32_i2s 20480 2snd_soc_core 184320 6 snd_soc_st

after follow the wiki, the can0(m_can2) can not start up on stm32mp157d-dk1root@stm32mp1:~# dmesg | grep can[ 0.384348] can: controller area network core[ 0.384666] can: raw protocol[ 0.384678] can: broadcast manager protocol[ 0.384695] can: netlink gateway - max_hops=1[ 0.663370] m_can_platform 4400f000.can: no clock found root@stm32mp1:~# cat /sys/kernel/debug/clk/clk_summary | grep fdcanfdcan_k 0 0 0 74250000 0 0 50000 Nfdcan 0 0 0 104438965 0 0 50000 N

I am using emmc in place of SD-card for custom hardware of STM32MP135FAE7. If FlashLayout_sdcard_stm32mp135f-dk-optee.tsv file will work using STM32cube programmer to upload all boot files??Whether all procedure will be same for boot sequence as we do for STM32mp135f-dk development kit, like switch positions etc.?? Please clear this doubt!!!

I am trying to configure SPI5 on STM32MP151C where MPU is a master and ESP32C6 is a slave. The clock used in the device tree is HSI 64MHz. SPI driver is running with 2MHz configured and divisor in the SPI_CFG1 register is correctly set to 32. In the dmesg logs I could see that speed is set to 2MHz. What is actually measured with oscilloscope on a clk out is approximately a 1/1000 of configured frequency, around 1.8 kHz. Furthermore duty cycle is clearly not a 50%. Would appreciate any ideas what might be wrong. Could it be some other function configured on that same pin used for clock? Problem in the device tree?

Hi, I set MCO1 using HSE clock and get 8MHz working well (my HSE is 8MHz)But I need 16MHz or higher on MCO1, so I changed to MCO1 source clock by HSI but there is nothing.I tested other CSI, HSE, ... MCO1 work, except for HSI.I think there is something or register to enable HSI but don't know where/ what it isAnyone know how to enable HSI clock?    

HelloI'm using stm32mp157aaa3 processor in our custom board.And I'm working on DDR3L with arm-trusted-firmware(V2.5) ddr3 routines as my reference code and reference manual(RM0436) and Application not(AN5168).When I am hard-coding the register values in arm-trusted-firmware it works fine which means my hardware is working fine,but when I'm porting the same code to bare-metal we couldn't read and write the ddr memory location and the ddr memory is not released.And I have also tried STM32DDRFW-UTILS.And here too i get the same issue.Could you please suggest me a way on how to assign memory size for ddr3l and release ddr memory in bare-metal and how to resolve the read and write issue.  Thanks&RegardsAkshitha 

Hi,I'm trying to build core-image-minimal yocto project for my STM32MP157D-DK1 board according to digikey tutorial and I stuck at fetching m4projects dependency. Does anybody faces and resolved this issue?My build conf:Build Configuration:BB_VERSION = "2.0.0"BUILD_SYS = "x86_64-linux"NATIVELSBSTRING = "universal"TARGET_SYS = "arm-poky-linux-gnueabi"MACHINE = "stm32mp1"DISTRO = "poky"DISTRO_VERSION = "4.0.15"TUNE_FEATURES = "arm vfp cortexa7 neon vfpv4 thumb callconvention-hard"TARGET_FPU = "hard"meta meta-poky meta-yocto-bsp = "kirkstone:f754b5d45b504e7486364ea9cfcb5f96086084bc"meta-oe meta-python = "kirkstone:402affcc073db39f782c1ebfd718edd5f11eed4c"meta-st-stm32mp = "kirkstone:311a492c21f0f3643f4b764f8b743c4c6908d31b"and error after invoking bitbake:ERROR: m4projects-stm32mp1-1.6.0-r0 do_fetch: Fetcher failure: Fetch command export PSEUDO_DISABLED=1; export DBUS_SESSION_BUS_ADDRESS="unix:path=/run/user/1000/bus"; export SSH_AGENT_PID="2291"; export SSH_AUTH_SOCK="/run/user/1000/keyri

Hello all, As part of the evaluation of the 32MP15 series, I was trying to build the u-boot and TF-A binaries. I tried the u-boot SPL bring up and it seems to be working fine (except for failure to launch the Linux Kernel, as per your late updates). For U-boot, I used : https://github.com/STMicroelectronics/u-bootAnd Build commands:   $  make -j12 stm32mp15_defconfig   $  make -j12 DEVICE_TREE=stm32mp157d-dk1 allFor TF-A binary, I used : https://github.com/STMicroelectronics/arm-trusted-firmware/tree/v2.8-stm32mpAnd Build command of BL32 (SP MIN mode):$ make -j12 ARM_ARCH_MAJOR=7 ARCH=aarch32 PLAT=stm32mp1 AARCH32_SP=sp_min DTB_FILE_NAME=stm32mp157d-dk1.dtb bl32 dtbsand Build command of BL2: make -j12 ARM_ARCH_MAJOR=7 ARCH=aarch32 PLAT=stm32mp1 STM32MP_SDMMC=1 STM32MP15=1 DTB_FILE_NAME=stm32mp157d-dk1.dtb LOG_LEVEL=40 DEBUG=1 and to generate FIP binary from TF-A Makefile, I used: $ make ARM_ARCH_MAJOR=

I have a custom built  STM32MP131FAF7T board and can't set my VOUT2. The only line that is down is my VDD DDR Lines since I can't program my PMIC (STPMIC1DPQR) to have the VOUT2 to be 1.35 volts instead of 1.1 volts. My VCPU is at 1.2V, VDD is at  3.3V and VCORE is at 1.2V. 

Hey, I'm following the Getting started tutorial and have some troubles at the chapter "Modify, rebuild and reload the Linux kernel":https://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP157x-DK2/Develop_on_Arm%C2%AE_Cortex%C2%AE-A7/Modify,_rebuild_and_reload_the_Linux%C2%AE_kernel Everything works up until Building the Linux images withmake ARCH=arm uImage vmlinux dtbs LOADADDR=0xC2000040This creates the following error:CALL scripts/checksyscalls.shCC drivers/clk/clk-scmi.odrivers/clk/clk-scmi.c: In function ‘scmi_clk_round_rate_get’:drivers/clk/clk-scmi.c:49:33: error: ‘const struct scmi_clk_proto_ops’ has no member named ‘round_rate_get’49 | ret = scmi_proto_clk_ops->round_rate_get(clk->ph, clk->id, &round_rate);| ^~drivers/clk/clk-scmi.c: In function ‘scmi_clk_get_duty_cycle’:drivers/clk/clk-scmi.c:61:33: error: ‘const struct scmi_clk_proto_ops’ has no member named ‘get_duty_cycle’61 | ret = scmi_proto_clk_ops->get_duty_cycle(clk->ph,

I'm trying to use an ADV7280 videodecoder with DCMI and embedded linux on a board based on STM32157c-dk2. The decoder should output 720x576 picture resolution with the camera (PAL,CV) attached. However the DCMI seems to be in 'normal mode' which allows max 480x272 resolution based on app. note AN5020. How to change mode to circular buffer mode which should allow higher resolutions? I haven't found any linux device tree setups for that. Some settings for dma or dcmi ? Examples?

Hi all,We have a custom board based on stm32mp157f-dk2, with small changes.  But we have an issue that the board will not wakeup after remoteproc0(m4) is turned off (cmd: echo stop > /sys/class/remoteproc/remoteproc0/state). When m4 firmware is running, wakeup source works. The dk2 board is ok, no such issue. What may be the cause? We have spent much time on it but no finding. Please give some advice...Attatch my devicetree as follow.    

Working on setting up SPI bus and get a connection to ESP32C6 WiFi/BT module. Trying to configure SPI5 clock in device tree for STM32MP151. Have used different sources (HSI, HSE, PLL4Q), but the enable count on the SPI5_k clock is always zero. I am suspecting now that problem must be elsewhere. Has anyone stumbled upon this? 

any tips on how to enable and debug pll4_r and fdcan_k clock?

Hi,i implemented our TF-A update by using both bootareas:1) checking EXTCSD for active bank2) flashing opposite bank3) after verification switching EXTCSD (mmc bootpart enable)not failsafe but at least atomic / verified.(btw, i'm missing the feature that the ROMCode does a fallback to the inactive bootarea in case the selected one is unbootable.)The TF-A is not printing any information about the used partition. It's always showing:INFO: Using EMMCINFO: Instance 2INFO: Boot used partition fsbl1which is of course misleading, because there is no fsbl1 partition anywhere on the emmc. It's also "1" if i boot from second boot area ([PARTITION_CONFIG: 0x50]), so the bootcontext information for this seems only to be valid in case of booting from userarea, e.g. SDC?Is there any (undocumented) information for that (reflecting used boot area) in the bootcontext i could use for a debug message? I ensured that the mechanism is working by selecting a bootpartition without content - nothing happens t

Hi I used pip3 install python submodule.The submodule inclued xxx.c files.The install processing be use 'arm-ostl-linux-gnueabi-gcc' compiler tool, The processing be fail.I can't find gcc-arm-aarch32-arm-none-linux-gnueabi tool for The STM32MPU157-DK2.I find out tools are 'gcc-arm-aarch64-arm-none-linux-gnueabi', But it can't use on the STM32MPU157-DK2.I use STM32-SDK provider comliler tools, it is don't working too.  The other question, The other way, How to install python submodule in the linux kernel image?

Hi,i'm implementing our field-update using the A/B mechanism for FIP image.Would like to use the Update Client described on the page as a template:https://wiki.st.com/stm32mpu/wiki/Secure_Firmware_Update#Update_ClientBut no idea where to find it. I didn't find anything promising in the meta- repos from st?Where to get it? I think i will be able to do the metadata things. But it would be interesting how to read the backup registers from Linux:register TAMP_BKP10R ? How to read it?I'm on a STM32MP13xthanks + br,Simon KretschmerDSA Datasystems / comlet GmbH

Hello everyone!I am trying to bring up a custom board based with a STM32MP151 (C Variant) with OPTEE, TF-A and U-BOOT.So far so good, but when running the FIT Image (Kernel + DTB) it fails finding the boot storage. It looks like the device-tree is not correctly parsed, because I did not find any activated/bind drivers in the kernel log dmesg during boot.Here is the bootlog (from OPTEE/TF-A/UBOOT/FIT)NOTICE: CPU: STM32MP151CAA Rev.ZNOTICE: Model: STMicroelectronics custom STM32CubeMX board - openstlinux-6.1-yocto-mickledore-mp1-v23.06.21INFO: PMIC version = 0x21INFO: Reset reason (0x15):INFO: Power-on Reset (rst_por)INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000INFO: FCONF: Reading firmware configuration information for: stm32mp_ioINFO: Using SDMMCINFO: Instance 1INFO: Boot used partition fsbl1NOTICE: BL2: v2.8-stm32mp1-r1.0(debug):()NOTICE: BL2: Built : 12:46:46, Dec 14 2023INFO: BL2: Doing platform setupINFO: RAM: DDR3-DDR3L 16bits 533000kHzINFO: Memory size =

Hi,I have written a cpp program with two threads, one thread for uart serial communication and other thread to control the GPIOsi have compiled it, and i got a binaryButWhen i transfered it to the board i get the error ./fw_dali_controller: line 1: syntax error: unexpected ")" I will paste the Makefile below knidly help me in resolving the issue.Makefile# Makefile for fw_dali_controllerPROG = daliCC = g++ #CFLAGS = -Wall -std=c++11#LDFLAGS = -lpthread # Add / change option in CFLAGS and LDFLAGS CFLAGS += -Wall $(sudo shell /home/nitesh/STM32MPU_workspace/STM32MP1-Ecosystem-v5.0.0/Developer-Package/SDK/sysroots/cortexa7t2hf-neon-vfpv4-ostl-linux-gnueabi/usr/share --cflags gtk+-3.0) CFLAGS += -Wall $(sudo shell /home/nitesh/STM32MPU_workspace/STM32MP1-Ecosystem-v5.0.0/Developer-Package/SDK/sysroots/cortexa7t2hf-neon-vfpv4-ostl-linux-gnueabi/usr/src/debug --cflags shared-mime-info) LDFLAGS += $(sudo shell /home/nitesh/STM32MPU_workspace/STM32MP1-Ecosyste

Hi! I am using an STM32MP153 and am working on implementing the STOP mode functionality for my application. The MCU shall wake up on a falling edge on pin PI8. The pin PG15 has an interrupt attached to it for another functionality. Before going into stop mode, I must disable the PG15 interrupt for applicational reasons. Going into stop mode and waking up works fine unless I disable the interrupt on PG15. If going to stop mode fails, the power consumption is approx. 830mW and I cannot wake up the system on pin PI8. I cannot explain this behaviour, does anyone have an idea? Thanks a lot!Here are snippets of my code: /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = GPIO_PIN_8; GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = GPIO_PIN_15; GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GYRO1_INT1_GPI

Hi,I use in my project STM32MP153, which is a model without a GPU. My application also doesn't need any graphical representation like Wayland, X11, etc. How can I update st-image-weston.bbappend to remove these unnecessary elements?ThanksMW

Hi All, I'm trying to boot a custom board using the Starter Package through the STM32CubeProgrammer. I'am flashing the SD Card on the board through the UART interface as USB interface(CN7/USB_OTG) is not provided for the board. During this process I'am getting the following error.It would be very helpful if any one can give some leads on this.

 Hello all,I'm working on a custom board based on a stm32mp157c & stpmic1 (connected on I2C4). We are using secure boot and have configured the I2C4 to work in secured mode. To control the stpmic1 from the unsecure / normal world, we use the scmi-regulator under linux.The following configuration seems to work:- i2c4 clock source: CLK_I2C46_PCLK5- stpmic will be initialized in optee (stpmic will be detected and the various regulator entries will be created)- regulator entries are created under linux- regulator entries can be controlled by userspace consumers (echo "enabled" > /sys/devices/platform/userspace_consumer_vdd_xyz)Changing the clock source to CLK_I2C46_PLL3Q (which is configured to provide the same frequency as PCLK5) results in the following behaviour:- stpmic will be initialized in optee (stpmic will be detected and the various regulator entries will be created) - everything seems to be fine (communication with stpmic1 is working)- regulator entries are created u

Hi, We would like to drive pin PWR_ON to low for low power mode.First, on MCU, we use HAL library: HAL_PWR_EnterSTANDBYMode(), load to M4 and run it first, so M4 now enter standby mode.Second, on MPU, we set TZEN=0 so non-secure, allow us to modify PWR and RCC registers.We write a small application, using devmem to change registers, code is below:...int main() {    Register.SetBits(PWR_MPUCR, 1 << 9); //PWR_MPUCR_CSSF    Register.SetBits(PWR_MPUCR, 1 << 3); //PWR_MPUCR_CSTBYDIS    Register.SetBits(PWR_MPUCR, 1 << 0); //PWR_MPUCR_PDDS    Register.SetBits(PWR_CR1, 1 << 0); //LPDS    Register.SetBits(PWR_CR1, 1 << 1); //LPCFG    Register.SetBits(PWR_CR1, 1 << 2); //LVDS    Register.Write(RCC_MP_SREQSETR, 1 << 0);//RCC_MP_SREQSETR_STPREQ    Register.Write(RCC_MP_RSTSCLRR, 0x7FF);//RCC_MP_RSTSCLRR => clear reset flags    __asm volatile ("dsb" : : : "mem

I am working on a system designed on stm32mp157c mpu. I am trying to setup a remote debugging setup wherein I am running an openocd debugger script on this stm32mp1 mpu. The target I am debugging is an stm32f405 discovery board, which is connected to the mpu via stlink/V2 in-circuit debugger using SWD. Finally, I will be connecting to the debugger on my remote PC through CubeIDE using the 'Connect to remote GDB server port'. I was successful in creating the openocd environment at the stm32mp1 end, however, connecting to this via CubeIDE gave me an error.---------------------------------------------xPack OpenOCD armhf Open On-Chip Debugger 0.11.0+dev (2021-10-16-21:24)Licensed under GNU GPL v2For bug reports, read http://openocd.org/doc/doxygen/bugs.htmldebug_level: 2Warn : Interface already configured, ignoringError: already specified hl_layout stlinkInfo : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWDsrst_only separate s