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Hi,Since Ecosystem 5 OP_TEE is mandatory.We have previously used SP_MIN which is not supported anymore.The change from SP_MIN to OP_TEE costs us approximately an extra second in boot time, we need to limit this as much as possible.I came across in the wiki here - "STMicroelectronics provides OP-TEE support that also embeds a secure monitor on Armv7. It can be replaced with a trusted OS or another trusted environment execution (TEE).".I was wondering, is it possible to change OP-TEE to a different lighter vendor? If so, is there a document describing the steps necessary?Thanks in advance
Dear STM32 Forum Community, I am currently working with the STM32MP157F-DK2 development kit and have encountered an issue while trying to run a QT project that includes graphical elements. Issue Description: When attempting to execute the QT project, I receive the following error: root@stm32mp1:/usr/local# ./demo_current_project./demo_current_project: error while loading shared libraries: libQt5Charts.so.5: cannot open shared object file: No such file or directory Steps Taken: Successfully ran QT projects without graphical components. Ensured that all necessary QT libraries are installed on the system. I have followed https://wiki.st.com/stm32mpu/wiki/How_to_build_and_use_an_SDK_for_QT for QT Implemetation Despite these efforts, the problem persists. I suspect that there might be an issue related to the library path or an incomplete library installation. Request: Could anyone provide guidance or suggest steps to resolve this issue? Specifically, I need assistance with: Confirming th
hello my board usb stm32mp135faf7 cpu. and the display part change to hdmi (refer to stm32mp157c-dk discovery kit,sii9022). as demesg bellow.but I down know how to display a picture on my TV screen(to test the hdmi can worky)log:# echo 6 > /sys/module/drm/parameters/debug### dmesg[ 868.768386] stm32-display 5a001000.display-controller: [drm:check_connector_changed] [CONNECTOR:32:HDMI-A-1] status updated from disconnected to connected[ 868.768467] stm32-display 5a001000.display-controller: [drm:check_connector_changed] [CONNECTOR:32:HDMI-A-1] Changed epoch counter 6 => 7[ 868.768509] stm32-display 5a001000.display-controller: [drm:drm_sysfs_connector_hotplug_event] [CONNECTOR:32:HDMI-A-1] generating connector hotplug event[ 868.768665] stm32-display 5a001000.display-controller: [drm:drm_fb_helper_hotplug_event][ 868.768700] [drm:drm_client_modeset_probe][ 868.768732] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:32:HDMI-A-1][ 868.785066] [drm:update_display_info]
See debug out for details.CA7 : Forward efd info for buf7 with mFdSdbRpmsg:7 and efd:15CA7 : DBG mmappedData[7]:0xb4d00000CM4 : SDB0_RxCpltCallback: B7Ae8800000L00100000CM4 : treatSDBEvent OK physAddr=0xe8800000 physSize=1048576 mArrayDdrBuffCount=7According to the reference manual this area is only accessible by the A7 (DDR Extension).I am using the /dev/rpmg-sdb driver to map the memory.How do I get mmap to map in the proper space? Not sure why it is mapping in the upper range of DDR.I have been using the logic analyzer example.
Hello,I am working on a schematic for the STM32MP257FAI3 and the documentation seems to be inconsistent and/or incomplete regarding which ports go where with the built-in Ethernet switch. The data sheet says ETHSW has three ports in which the "The third port is connected internally to the ETH1 controller". This implies that ETH2 and ETH3 are the external RGMII interfaces.The "Getting Started with ... Hardware Development" guide says "ETH1 is either ETH1 direct or ETHSW port2" (it is unstated, but combined with the data sheet this would be an internal connection), and ETH3 there is a note "ETH3 is ETHSW port1". There is no such note for ETH2, so this omission implies that ETH2 is not connected to ETHSW (or perhaps it is connected through STNoC??). The block diagram in the data sheet also matches this notion.In any case, it would be very helpful if there was a table that show what is connected to what when ETHSW is enabled. At this point I need to know what pins t
Dear All, I have been working on communicating with LCD module by 3 wire, 9bits SPI. Firstly I implemented it by gpio. I can communicated with LCD module by 3 wire, 9bits SPI. But we encounter problem in total time in sending pixel data by SPI. We're using 320X240 LCD. It takes around 18 seconds to transfer all pixel data to LCD module. Therefore I need to find another way to reduce time in communicating with LCD module. We think that SPI driver will be faster than using GPIO. But I wonder how to send each data in 9 bits. If anyone have experience about SPI 9 bits, please advise.
drivers/firmware/arm_scmi/optee.c:202:32: error: ‘TEE_OCALL2_OUT_PARAM1_ERROR’ undeclared here (not in a function) 202 | PTA_SCMI_OCALL_ERROR = TEE_OCALL2_OUT_PARAM1_ERROR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~drivers/firmware/arm_scmi/optee.c:228:31: error: field ‘ocall_arg’ has incomplete type 228 | struct tee_ocall2_arg ocall_arg;drivers/firmware/arm_scmi/optee.c: In function ‘setup_ocall_thread’:drivers/firmware/arm_scmi/optee.c:518:38: error: ‘TEE_OCALL2_ARG_INIT’ undeclared (first use in this function) 518 | .ocall_arg = TEE_OCALL2_ARG_INIT, I checked that the corresponding optee.c file does not declare t
Hi, I'm trying to change the value of the register RCC_RDLSICR (RCC reset duration and LSI control register, address offset 0x144). I need to change the Minimum Reset Duration value.In all power management/low power handling manuals for STM32MP15x lines the documentation says that you can change the registers value, but I can't find HOW I can achieve that. I can write them in dts? inside u-boot? please I need clarifications about that. NOTE: I'm using a custom STM32MP153 board with OpenSTLinux distribution on it. Thanks a lot
Hello, I hope you are doing well. I have developed a custom PCB with the STM32MP153AAB microprocessor. The process followed almost all the steps in the wiki for the STM32MP157F-DK2 discovery kit, however, some pins had to change due to the custom design and the fact that the 153 family has less available pins. We have modified the devicetree for the TFA, U-BOOT and KERNEL but the process stops in the TFA when it tries to start the SDRAM with the following output: We are using the STPMIC1APQR in order to provide all the tension levels for the MPU, RAM and other peripherals (similar to the STM32MP157F-DK2). The following images show the schematics for our own custom STPMIC1APQR design: We measured the voltage levels, and it shows that the buck2 is not providing any voltage, the same happens for all the LDOs that source the power supply for the RAM. Reading the STPMIC1APQR datasheet, we observed that the voltage levels are the d
We had a custom board with STM32MP135F series MPU on it, we just rolled out a new revision because we didn't connected PDR pin and it wasnt able to start after reset. But everything was booting correctly and all systems were working. Now in our new revision, we just fixed the PDR and added the emmc but when I try to boot with all debug and log levels maxed, I get this error on my console and nothing else; PANIC at PC : 0x2ffee107 Exception mode=0x00000016 at: 0x2ffee107 I'm not sure this is TF-A output because all debug logging is allowed. It seems like its panicking at the end of SYSRAMI suspected my clock settings but the parts has not been changed, its the same crystal and same device tree settings should work.Also I'm able to boot with UART/USB mode and connect to device with UART (USB also doesnt work in this mode somehow), I can even load DDR utility binary with STM32Programmer CLI, but after the code downloads to target I loose conn
Hello all,I was trying to build Linux kernel and push into my STM32MP135F-DK. For this, I was following the steps below link (Modify, rebuild and reload the Linux® kernel):https://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP135x-DK/Develop_on_Arm%C2%AE_Cortex%C2%AE-A7/Modify,_rebuild_and_reload_the_Linux%C2%AE_kernelNothing seemed wrong to me until "5.4. Reboot the board" step. After I rebooted the board, only the ST logo appears for a while, then it disappears and a black screen appears for a few seconds, then the ST logo appears again. This loop continues constantly and never switches to other screens (Linux splash screen, Weston desktop, GTK demo launcher).I have no idea why I experienced such a thing since everything seemed correct until the reboot step. I wondered if I had pushed the wrong device tree in the "5.2. Push the device tree into the board" step in the link above (since I was using STM32MP135F-DK, I pushed the stm32mp135f-dk.dtb one). But I am not su
We have set PB7 and PE15 for I2c4 communication for PMIC in op-tee stm32mp135f-dk.dts.but we keep getting pmic error like this -I/TC: Embedded DTB foundI/TC: OP-TEE version: Unknown_3.19 (gcc version 12.2.0 (GCC)) #23 Mon Jan 8 10:50:26 UTC 2024 armI/TC: WARNING: This OP-TEE configuration might be insecure!I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.htmlI/TC: Primary CPU initializingI/TC: WARNING: All debug access are allowedE/TC:0 0 Panic at core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pmic.c:183 <initialize_pmic_i2c>E/TC:0 0 TEE load address @ 0xde000000E/TC:0 0 Call stack:E/TC:0 0 0xde0030f9E/TC:0 0 0xde0193a7E/TC:0 0 0xde006735E/TC:0 0 0xde017fb9E/TC:0 0 0xde018089E/TC:0 0 0xde018773E/TC:0 0 0xde01a095E/TC:0 0 0xde002fbbE/TC:0 0 0xde00019c
Hi, We are in a new project (first time with embedded Linux and device tree's in general) and i want to config my device (STM32MP151CAA3 on a custom board) to boot from FMC NAND flash (MT29F8G08ABACAH4-IT:) and i am having some trouble with the device tree configuration. i am following the guidelines from the ST wiki regarding this: https://wiki.st.com/stm32mpu/wiki/FMC_device_tree_configuration. The base settings i understand and the wiki refers to the following boot configuration settings (which refer to ONFI settings again) https://wiki.st.com/stm32mpu/wiki/STM32_MPU_ROM_code_overview#Flash_memory_boot From here i don't understand how to add the ONFI data to the ROM code, do i need to add these settings in the device tree somewhere or are these settings uploaded via CubeProgrammer. I also don't know if i need to add the necessary partitions on the NAND flash to the device tree or not. The 'STM32 MPU ROM code ' page refers to the MPU flash mapping page which explains the n
Hi! According to the instructions on page https://wiki.st.com/stm32mpu/wiki/How_to_perform_Secure_Boot_from_Distribution_package#Creating_signature_key_for_STM32MP15x_lines1.) Problem at 5.1 STM32MP> load mmc 1:8 0xc0000000 publicKeysHashHashes.bin 32 bytes read in 9 ms (2.9 KiB/s) STM32MP> stm32key fuse 0xc0000000 PKHTH OTP 24: 00000000 lock : 10000000 PKHTH OTP 25: 00000000 lock : 10000000 PKHTH OTP 26: 00000000 lock : 10000000 PKHTH OTP 27: 00000000 lock : 10000000 PKHTH OTP 28: 00000000 lock : 10000000 PKHTH OTP 29: 00000000 lock : 10000000 PKHTH OTP 30: 00000000 lock : 10000000 PKHTH OTP 31: 00000000 lock : 10000000 PKHTH is not locked! PKHTH is free! Writing PKHTH with PKHTH OTP 24: [c0000000] ba7dda6a PKHTH OTP 25: [c0000004] 3fcc0388 PKHTH OTP 26: [c0000008] e41a498b PKHTH OTP 27: [c000000c] ea3dcd70 PKHTH OTP 28: [c0000010] e51b284c PKHTH OTP 29: [c0000014] 25a7369c PKHTH OTP 30: [c0000018] ca014ca6 PKHTH OTP 31: [c000001c] 1a69811e Warning: Programming fu
I follow X-LINUX-AWS Expansion Package guide. Now 6.2 MQTT subscribe and publish testbut what use ca.pem file?I use Board $> cat /opt/greengrass/v2/work/aws.greengrass.clientdevices.Auth/ca.pemGG_CORE_IP=192.168.7.1PC cmd)mosquitto_sub \-h ${GG_CORE_IP} \-p 8883 \--cert device-client-1-certs/device.pem.crt \--key device-client-1-certs/private.pem.key \--cafile ca.pem \-t "+/hello/world" \-u ClientDevice1 \-i ClientDevice1Error: A TLS error occurred. but error occurred.thanks, reply.
Hi MP2 Champ ! Is there a table that summarizes the power consumption data of STM32MP25 series by use case?I can find data for MP1 series, but I can't find simple data for MP2 series except datasheet. Thanks.Best Regards, Jack
Hi,we've upgraded our build from 5.15 to 6.1 and now the OS does not get the mac address set in uboot environment through a script. If i check the environment i can correctly see the ethaddr set via printenv. Is there something i can do in kernel config or ethernet driver?
Unable to get STM32 DDR PMU clockstm32-display 5a001000.display-controller: stm_drm_platform_probestm32-display 5a001000.display-controller: drv_load:-517debugfs: Directory 'cpu0' with parent 'opp' already present!remoteproc remoteproc0: releasing m4Unable to get STM32 DDR PMU clockstm32-mdma 58000000.dma: STM32 MDMA driver registeredstm32-dma 48000000.dma: STM32 DMA driver registeredstm32-dma 48001000.dma: STM32 DMA driver registeredreg11: supplied by vddreg18: supplied by vddusb33: supplied by regulator-dummystm32-display-dsi 5a000000.dsi: platform_set_drvdatapanel-ilitek-ili9881d 5a000000.dsi.0: cannot get reset GPIO: -517stm32-display 5a001000.display-controller: stm_drm_platform_probestm32-display 5a001000.display-controller: drv_load:-517stm_thermal 50028000.thermal: stm_thermal_probe: Driver initialized successfullydebugfs: Directory 'cpu0' with parent 'opp' already present!stm32-crc32 58009000.crc: Initializedstm32-hash 54002000.hash: will run requests pump with realtime priori
Hello,I am currently engaged in a project that involves using TrustZone to securely display an image on the STM32MP135F-DK. I'm facing several challenges, especially in configuring the framebuffer for secure display purposes:1. Running the 'hello_world' Example: I am experiencing issues with running the TrustZone 'hello_world' example from OP-TEE on the board. I tried to get the OP-TEE version that supports STM32MP1, compile OP-TEE, and copy the output OP-TEE trustzone's hello_world binary to the board. But it cannot be directly executed on the board.2. Triggering TrustZone: After installing the SDK for STM32MP135F-DK and recompiling the kernel and drivers as per the instructions from the wiki, I am unsure of how to proceed with testing the OP-TEE 'helloworld' example. Should I compile it within the SDK and then transfer the binary to the board?3. Secure Framebuffer Configuration: I noticed that the dts file for STM32MP135F-DK already defines a secure framebuffer. Does it provide inter
hi, is there any source code or document about STM32PRGFW_UTIL_MP13xx_CP_Serial_Boot.stm32
Hello,I would like to set up the PMIC for the MP13 series using Baremetal. The provided PMIC-related documentation appears to be related to Linux. Is there any documentation or example available for using it with Baremetal?Thank you.
Hi st team, I am using the STM32MP135f-DK board and I want to enable CANFD drivers. First I checked if the CAN drivers are enabled in menuconfig using: bitbake virtual/kernel -c menuconfig (everything has been selected) Then I went to ~/STM32MPU_workspace/STM32MP1-Ecosystem-v5.0.0/Distribution-Package/build-openstlinuxweston-stm32mp1/tmp-glibc/work-shared/stm32mp1/kernel-source/arch/arm/boot and modified the files as follows: stm32mp13-pinctrl.dtsi (configured the pins PG1 (pin 16 CN8) for TX and PG3 (pin 18 CN8) for RX) fdcan2_pins_mx: fdcan2_mx-0 { pins1 { pinmux = <STM32_PINMUX('G', 1, AF9)>; /* FDCAN2_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { pinmux = <STM32_PINMUX('G', 3, AF9)>; /* FDCAN2_RX */ bias-disable; };};fdcan2_sleep_pins_mx: fdcan2_sleep_mx-0 { pins { pinmux = <STM32_PINMUX('G', 1, ANALOG)>, /* FDCAN2_TX */ <STM32_PINMUX('G', 3, ANALOG)>; /* FDCAN2_RX */ };}; tm32mp135f-dk.dts added: &m_can2{ pinctrl-names = "
I could not complete loading a board following the WiKi How to load U-Boot with dfu-util.The process describes sending the tf-a file then the fip file however this always fails the correct procedure is to send the tf-a file then send the flashlayout file then only send the fip file.Looking at the output of the stm32 programmer its clear the order must be tf-a then flashlayout then fip11:49:35 : Start Embedded Flashing service11:49:35 : Memory Programming ...11:49:35 : Opening and parsing file: tf-a-stm32mp157c-comb_ns_combo-mx-usb.stm3211:49:35 : File : tf-a-stm32mp157c-comb_ns_combo-mx-usb.stm3211:49:35 : Size : 220.31 KB11:49:35 : Partition ID : 0x0111:49:35 : Download in Progress:11:49:39 : File download complete11:49:39 : Time elapsed during download operation: 00:00:03.92611:49:39 : RUNNING Program ...11:49:39 : PartID: :0x0111:49:39 : Start operation done successfully at partition 0x0111:49:39 : Flashlayout Programming ...11:49:39 : Running Flashlayout Partition ...11:49:39
I am trying to interface DAC for the STM32 MP157D-DK1 board I have. I am just curious does the board even support DAC. I dont see any mention of that in the datasheet. That is the only option that I can select when I do DAC Enable for M4 Cube in cube programmer. In NVIC settings only option is EXTI line 9 interrupt available for me to select.
I'm having a challenge moving changes from our Developer Package to our Distribution package. We've modified device trees using CubeMX for our board and have all the changes for TF-A, optee, u-boot and the kernel working in the Developer Package. Now when I take those changes and port them into the distribution package and build with bitbake it is giving me the following error.Hit any key to stop autoboot: 1 NOTICE: CPU: STM32MP157CAC Rev.Z NOTICE: Model: STMicroelectronics custom STM32CubeMX board - openstlinux-6.1-yocto-mickledore-mp1-v23.06.21 INFO: PMIC version = 0x21 INFO: Reset reason (0x15): INFO: Power-on Reset (rst_por) INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000INFO: FCONF: Reading firmware configuration information for: stm32mp_ioINFO: Using SDMMCINFO: Instance 1INFO: Boot used partition fsbl1NOTICE: BL2: v2.8-stm32mp1-r1.0(debug):devtool-patched-dirty(27df046a)NOTICE: BL2: Built : 15:15:46, Apr 30 2024INFO: BL2: Doing platform setupINFO: RAM: DDR
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