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Hi ST:I am devloping the STM32MP131c with yocto packageEverytime after i modify the dts using devtool, i need tobitbake st-image-coreand flash all image with stm32cubeprogramming tool There is a ethernet on my boardIs there any faster way to help me verify my dts modificationMaybe compile the dtb only and scp into DUT or compile bootfs only and i can only flash the bootfs partition Thank you
Hello,I have a problem with the PDF tutorial (attached) for installing the GNSS1 module on the STM32MP257F-EV1. It says:Step 1. Modify the device tree or copy it from the folder provided.Step 2. Download the kernel sources as described in Section 4.3.Step 3. Copy the dts file from the directory: x-linux-gnss1-app\linux-kernel\patch\5.15\kernel to the kernelsource directory at <KERNEL SOURCE PATH>/ arch/arm/boot/dts/. So I followed the tutorial Modify Rebuild and Reload the Linux Kernel:https://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP135x-DK/Develop_on_Arm%C2%AE_Cortex%C2%AE-A7/Modify,_rebuild_and_reload_the_Linux%C2%AE_kernel I copied the patch and applied them with this line: ```for p in `ls -1 *.patch`; do patch -p1 < $p; done``` Then I tried to compile the device tree (after starting the SDK) Here are the errors: make[2]: *** No rule to make target “debian/canonical-certs.pem”, needed by “certs/x509_certificate_lis
I am working on a design using the STM32MP257DAI3 and LPDDR4 memory. During the layout phase I was reviewing the routing guidelines from an5724. Section 6.3 recommends the following controlled impedances are required for the LPDDR4 interfaces:for single-ended signals: 55 Ω ±10%.for differential signals: 100 Ω differential ±10%Can ST help me understand why they recommend 55 and 100 specifically for STM32MP257DAI3 with LPDDR4 and not 45 ohm single-ended and 85 ohm differential, which is what many 3rd parties seem to be proposing?
Hi there,I'm using STM32MP257F-DK and bringing up by FlashLayout_emmc_stm32mp257f-dk-ca35tdcid-ostl-optee.tsv.I found there is no wifi/bt device by command ifconfig. It's only showing below. root@stm32mp2:/etc# ifconfigend0 Link encap:Ethernet HWaddr 10:E7:7A:E3:AA:F4inet6 addr: fe80::12e7:7aff:fee3:aaf4/64 Scope:LinkUP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1RX packets:0 errors:0 dropped:0 overruns:0 frame:0TX packets:102 errors:0 dropped:0 overruns:0 carrier:0collisions:0 txqueuelen:1000RX bytes:0 (0.0 B) TX bytes:28558 (27.8 KiB)Interrupt:58lo Link encap:Local Loopbackinet addr:127.0.0.1 Mask:255.0.0.0inet6 addr: ::1/128 Scope:HostUP LOOPBACK RUNNING MTU:65536 Metric:1RX packets:130 errors:0 dropped:0 overruns:0 frame:0TX packets:130 errors:0 dropped:0 overruns:0 carrier:0collisions:0 txqueuelen:1000RX bytes:9985 (9.7 KiB) TX bytes:9985 (9.7 KiB)usb0 Link encap:Ethernet HWaddr DA:74:68:4A:DE:B0UP BROADCAST MULTICAST MTU:1500 Metric:1RX packets:0 errors:0 dropped:0 overruns
We have changed our ecosystem from kirkstone to mickledore, everything is working fine but the SPI6, is malfunctioning,It fails with the logs in kernel that `clock not found`If you can help me with this?thanks,Umer
I'm doing board bringup on my board with a stm32mp135dae.I've succesfully gotten through TF-A and OP-TEE OS and on to UBOOT, however I'm stuck in uboot with no clear way forward.Device trees are based on those generated by STMCubeMX. TF-A DTS worked as is, OP-TEE DTS needed board data added (mostly regulators).The STMCubeMX generated u-boot DTS needed these changes (so far):* add optee range to reserved-memory* add an aliases main section defining serial0 = &uart4;* add a chosen main section defining stdout-path = "serial0:115200n8";uboot defconfig is in-tree "stm32mp13_defconfig", no changes The DTS for uart4 is as defined in stm32mp131.dtsi has the standard:clocks = <&rcc UART4_K>;&rcc is enabled with a status = "okay"; and is using &scmi_clk as this is in uboot and uboot must go through optee via SCMI interface to get clock information. On startup of uboot,clk_get_by_index() fails with -ENODEV from stm32_serial_probe().call into stm32_serial_pro
Hello.I am trying to use "openstlinux-6.6-yocto-scarthgap-mpu-v25.03.19".The "revision" of "meta-st-stm32-addons" in "oe-manifest/default.xml" seems to be old, is this the correct setting?In "meta-st-stm32mp-addons/conf/layer.conf", there is the following description.LAYERSERIES_COMPAT_stm-st-stm32mp-mx = “mickledore”ST_OSTL_COMPATIBILITY_VERSION_stm-st-stm32mp-mx = “5.1” Thank you for your assistance.
We are pleased to announce that the minor release 1.18.1 of STM32CubeIDE is available. What is new in 1.18.1: This minor release will not bring any major updates to the STM32CubeIDE 1.18.1. It will be aligned with the STM32CubeMX 6.14.1. Main fixed issues in 1.18.1: Refer to the STM32 microcontroller wiki at: Known problems and limitations in 1.18.1: Refer to the STM32 microcontroller wiki at:wiki.st.com/stm32mcu/wiki/Category:STM32CubeIDE_errata How to get STM32CubeIDE 1.18.1: Under this link Or update your current installation of STM32CubeIDE using: Help > Check for updates (The in-tool update does not allow updating the drivers and STLINK server tool. Full installation is required for this to be done).
What method should be used to implement 1-wire communication (master) on STM32MP13x board? After doing the research I've found that:for RPI, kernel module w1-gpio can be used to achive 1-wire communication. It's done on kernel level so those critical 1-wire timings can be met. But this module is not natively availabe for STM32MP1, there is no DT overlay ready (like for RPI)dedicated IC like DS2482-800 can be use as a 1-wire master in-the-middle, from which STM32MP1 can later read out the data using I2Cno M-core co-processor is available for STM32MP13x seriesMaybe there is a chance to port the w1-gpio to STM32MP1. But when using it, or the dedicated IC like DS2492-800 1-wire to I2C, I can only communicate with slaves that perfectly follow all 1-wire slave requirements (reset-present signals, timings, commands etc.). For my usage I need to have more control, because some of the 1-wire slaves I would like to communicate with do not follow those rules (they use custom f
Hello! I have succesfully run some test using the model zoo services repo. For classification and object detection I understand. What I cannot find out is whether it is possible to make a custom inference script. My use case requires to run an object detection and then do binary classification on the cropped objects using a classification model. Is it possible to write such a custom script using models generated from the zoo? Also, can i run inference without a camera on images or video? I have purchased the STM32MP257F-EV1 board.Thanks in advance!
Hi all,I'm working with the STM32MP135D-FK board and have created a custom machine for Yocto, using the openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06 release. I generated the base Device Tree using STM32CubeMX, and I'm trying to enable SPI5 with spidev interface.Here's the relevant section of my Device Tree (in stm32mp135d-myboard.dts): &spi5 {pinctrl-names = "default", "sleep";pinctrl-0 = <&spi5_pins_mx>;pinctrl-1 = <&spi5_sleep_pins_mx>;status = "okay";cs-gpios = <&gpiof 10 GPIO_ACTIVE_LOW>;spidev@0 {compatible = "linux,spidev";reg = <0>; /* CS #0 */spi-max-frequency = <10000000>;status = "okay";};};/* Active (default) state */spi5_pins_mx: spi5-0 {pins1 {pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */<STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */bias-disable;drive-push-pull;slew-rate = <1>;};pins2 {pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */bias-disable;};};/* Sleep state */spi5_sleep_pins_mx: sp
Dear ST team, I trained a face detection model.On https://stedgeai-dc.st.com/, Select a platform->Quantize->Optimize->BenchmarkI found that GPU occupies 93.69% and NPU occupies 6.31%. How to improve npu utilization?According to the official website documentation, it should be per-channel now. How to convert it to per-tensor? The attachment below is my model file.Thanks.
HiI am trying to program the Cortex M33 of STM32MP257F-DK dev board using CubeIDE. I have generated the code in Cube IDE. The debugger failing to program as the board not responding.Following are my debug settings:Again I tried using STM32 Cube Programmer, no luck.But its able to detect Cortex A35 using USB DFU mode and able to flash Linux into sd card.But the MCU is unable to detect.I tried boot settings in Development Mode 0011. Also tried 0001 and 0000. Same issue.Can anybody let me know where I am going wrong?
Hello,I currently upgraded to Scarthgap, and noticed that weston-touch-calibrator does not work anymore. I have tried it on a custom board and a stm32mp135-disco board, and they exhibit the same behavior. It first loads just fine, but once you touch the cross no check-mark or cross appears on the screen. If you do root@stm32mp13-disco:~# weston-touch-calibrator --debug "/sys/devices/platform/soc/5c007000.bus/4c006000.i2c/i2c-1/1-005d/input/input0/event0"could not load cursor 'dnd-move'could not load cursor 'dnd-copy'could not load cursor 'dnd-none'Configure calibrator window to size 480x272Down[0] (0.183333, 0.106618)Finish[0]Conv[0] (0.150000, 0.099265)Down[1] (0.166667, 0.139706)Finish[1]Conv[1] (0.850000, 0.128676)Down[2] (0.172917, 0.202206)Finish[2]Conv[2] (0.200000, 0.801471)Down[3] (0.154167, 0.091912)Finish[3]got all touchesConv[3] (0.700000, 0.750000)calibration test error: 1.050614, -1.262112weston-touch-calibrator error: Calibration verification failed, too large e
Hello ST Team,We are planning to use STM32MP23X in one of our design. Could you please also provide the list of DRAM and eMMC validated with the STM32MP235 MPU?Your Prompt response would be appreciate.Regards,Parth
Hello We are working on booting BareMetal application using SD Card in STM32mp257F-DK we have referred the following link to create header for binary filehttps://wiki.st.com/stm32mpu/wiki/STM32_header_for_binary_fileswe have few doubts regarding the above image:1) In optional flags, can we disable authentication and decryption 2) In binary type, what are the other formats other than FSBLM. In tf-a-stm32mp257f_dk_usb.stm32 file the binary type is mentioned as 0x10 is used, what binary type is it? In STM32MP157A we have set the value of binary type as 0x00 but it still boots our application. kindly help us resolving the above issue Thanks and RegardsAkshitha
Moved from MCUs forum.I met this error and can not continue flashing the board. Could any one help me? All configurations are same with https://wiki.stmicroelectronics.cn/stm32mpu/wiki/STM32MP25_Evaluation_boards_-_Starter_Package#Downloading_the_image_and_flashing_it_on_the_boardMy board is STM32MP257F-ev1, I just followed the sequence to flash my board, but failed.ld5, ld6 and ld11 are lighted when I start with usb/uart boot.PS: the system is Ubuntu 20.04 on a VirtualBox VM, And I can use Windows to flash the board, and I still can use this VM to flash the SD card with raw image. But the image will no be flashed via Ubuntu on normal flashing with this EVB 20250519:I use windows to flash this board without any problems. But seem I can not use virtualbox based ubuntu 20.04 to flash.
Hi , i am using the stm32mp157DAC processor , where in custom board i added the emmc with SDMMC2, in my hardware there is 3 bootpin, boot0 boot1 boot2 .i did changes in u-boot DTSi did changes in Linux DTS only in u-boot DTS i added this line in SDMMC2.&sdmmc2 {pinctrl-names = "default", "opendrain", "sleep";pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;non-removable;no-sd;no-sdio;st,neg-edge;bus-width = <8>;vmmc-supply = <&v3v3>;vqmmc-supply = <&vdd>;mmc-ddr-3_3v;status = "okay";};---------------Pinctrl pinmux---------------------------------------------sdmmc2_b4_pins_a: sdmmc2-b4-0 {pins1 {pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */<STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */<STM32_PINMUX('B', 4, AF9)&g
Hi,I'm trying to implement external inference models on the STM32MP257-DK for an object detection project. Currently, I'm using the base project provided by ST in the SDK and modifying a few files, such as:stai_mpu_object_detection.ccssd_mobilenet_pp.hppTwo generic implementation files for the YOLOv8n modelThe base structure remains mostly the same, with only the model being switched by updating the reference in stai_mpu_object_detection.cc — choosing between SSD MobileNet and YOLOv8n.After creating this “generic” module, I cross-compiled and transferred the binaries to the board. When selecting SSD MobileNet, everything works perfectly. However, when switching to YOLOv8n, no successful inference occurs.Does anyone have any documentation or guidance on how to implement external models on this board? I also implemented a debug printer that logs the total number of inferences. Here's what I get: SSD Mobilenetraw detections: 1idx = 0 class = 1 score = 0.969(
Hello,I'm debugging a user space application for stm32mp257f-ev1 (Core A35) using cubeIDE 1.17.0. After launching application debug the SFRs tab is empty. In project properties I can't find CMSIS-SVD Settings as for an M33 project for the same board.How can I change project's configuration to get peripheral's registers values in SFRs?Marco
Hi,I'm encountering an issue during the optimization process using Edge Cloud AI. Sometimes, even when using the same model architecture but with different file sizes, the optimization results vary significantly. In some cases, especially with smaller models, the NPU on the STM32MP257-DK is barely utilized (as shown in the benchmark below). Paradoxically, I’ve observed worse optimization performance with lighter models.In the images below, I show an example: from left to right, the models progressively increase in resolution, yet the optimization results behave inconsistently. Any suggestions on how to address this? TINY_YOLO_V2_192_INT8.TFLITE: Inference time: 87.52 msGPU: 95.85%NPU: 4.15% TINY_YOLO_V2_224_INT8.TFLITE: Inference time: 5.920 msGPU: 3.54%NPU: 96.46% TINY_YOLO_V2_416_INT8.TFLITE: Inference time: 12.13 msGPU: 4.50%NPU: 95.50%
Hello!I'm working on creating a signed FIT image in my Yocto build for the STM32MP1. After reviewing the FIT image build recipes in the meta-st layer, it seems that they only support U-Boot SPL, while my bootchain uses TF-A instead of SPL (I’m new to Yocto, so I might be mistaken). This tutorial did not work anymore.https://wiki.st.com/stm32mpu/wiki/How_to_create_Signed_FIT_image_from_Distribution_package I’ve been unable to find specific documentation on how to build a signed FIT image for STM32MP1 in Yocto. Could anyone provide guidance or direct me to relevant documentation for implementing and signing FIT images in this setup?Thank you in advance for any assistance!
Hello ST Team,We are planning to use the STM32MP2 series MPU in one of our design. We have found the below link for the validated DRAM with the STM32MP2 processor. We want to know other than that is there any other DRAM is validated with the STM32MP2 Processor?Reference Link:https://wiki.st.com/stm32mpu/wiki/Validated_DRAM_on_STM32_MPU_portfolio#STM32MP2-RegardsParth
Hello, We recently bought an STM32MP257f-dk board. We are running OpenSTLinux on it. We would like to connect a modem to communicate with the board via 4G. We're thinking of using a USB modem.Do you have a list of recommended modems or modems natively compatible with OpenSTLinux? Or are there any specific features to look for? If Linux drivers exist for a modem, will it be easily compatible with OpenSTLinux?Thank youGuillaume
Hi,I am developing Linux/RTOS for STM32MP257F-EV1 with a slight twist.The STM32MP257F has two A35 cores (Core-0 and Core-1), a M33 Sub-core (Core-3) and a Cortex- M0+.By default Linux uses A35 Core0 and Core-1(both cores). I want to run Linux on A35 Core0 and RTOS on A35 Core-1.To achieve this I am setting [nr_cpus=1] in the Kernel command.This option forces the Kernel to use only Core-0 for execution.Since Linux uses SDRAM for execution, I am loading my RTOS in SRAM via a debugger.But the moment the contents of SDRAM are changed, there is an exception/abort on Linux and the following message is displayed:------------------------------------------------------------------------------------E/TC:0E/TC:0 Core data-abort at address 0x7a480050E/TC:0 esr 0x96000210 ttbr0 0x8213b000 ttbr1 0x00000000 cidr 0x0E/TC:0 cpu #0 cpsr 0x800003c4E/TC:0 x0 0000000000000000 x1 0000000000000000E/TC:0 x2 0000000000008080 x3 0000000000002020E/TC:0 x4 00000000dededede x5 00000000ababababE/TC:0 x6 00000000abab
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