STM32 MPUs

I want to connect a 128x64 LCD to my STM32MP157D-DK1 board and implement a program on the A7 core Linux to display some parameters. What should I do? Thanks in advance.

Do we need to compile CUBEMX dts files before bitbake or we need to convert them into the dtb files with eclipse like in this ST video and what is the best way to go from discovery board to custom board in the means of creating device tree files for peripherals and all. I need some guidance.

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I have a large firmware that the MCU must execute. It will not fit into SRAM1-4, so I am trying to move the entire code (or a portion of it) to DDR RAM. I have no problems reading and writing DDR memory from the MCU, as long as it's just data, but for some reason when the PC jumps to an address in DDR, execution halts (or we get a HardFault, depending on if a debugger is attached to the MCU). If I move this section to SRAM, then everything works fine (except that my MCU firmware is limited to 384kB).I have set the linker so that the MCU code's entry point and Reset_Handler is in SRAM, and one particular linker section is in DDR RAM (0xC5000000 for example). I've verified the M4's elf file contains the proper sections. When I run the program, the A7 MPU properly loads the raw data of the M4's code into 0xC5000000, and I can confirm with a debugger that these addresses contain valid Cortex-M4 instructions.After that, the A7 releases the MCU HOLD on the co-processor. With a debugger attac

hi, i'm trying to make USB_FS work on my custom board. my desired configuration is peripheral (otg can be ok, i have jumper on id: PA_10)i already have 2 USB HS so i can use only USB_FS mapped on PA_11 and PA_12 as OTG. i follow the st wiki at the point 3.3.1 witn dr_mode = "peripheral";my result is: i can see 49000000.usb-otg under /sys/class/udc/i can create one gadget device in /sys/kernel/config/usb_gadget/g1 (i created serial over usb) as i assign 49000000.usb-otg > /sys/kernel/config/usb_gadget/g1/UDC, usb does not turn on, i always have 0V on PA_11 and PA_12 if i follow the st wiki at the point 3.3.2 witn dr_mode = "peripheral";all works great and i can create my usb gadget more info: my micro is STM32MP157F i'm using linux 5.10.10i have NO hardware pull_up or pull_down on any line i have VDD3V3_USBFS shorted with VDD3V3_USBHS (both connected to 3.3v)my otg port is B_TYPE and i have one jumper to select OTG mode (i need only peripheral) can anyone help me?

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I'm using a custom board (it is not DK1 even tho it says on boot log) with STM32MP157AAC. The boot hangs on u-boot without proper error message. Where should I start to search the failure? NOTICE: CPU: STM32MP157AAC Rev.Z NOTICE: Model: STMicroelectronics STM32MP157A-DK1 STM32CubeMX board - openstlinux-5.15-yocto-kirkstone-mp1-v22.06.15 WARNING: regulator_get_by_phandle: phandle 9 not found WARNING: VDD unknown INFO: Reset reason (0x15): INFO: Power-on Reset (rst_por) INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000 INFO: FCONF: Reading firmware configuration information for: stm32mp_io INFO: Using SDMMC INFO: Instance 1 INFO: Boot used partition fsbl1 WARNING: regulator_get_by_phandle: phandle 12 not found NOTICE: BL2: v2.6-stm32mp1-r1.0(debug):v2.6-dirty NOTICE: BL2: Built : 13:14:26, Nov 23 2021 INFO: BL2: Doing platform setup INFO: RAM: DDR3-1066/888 bin G 2x2Gb 533MHz v1.44 INFO: Memory size = 0x20000000 (512 MB) INFO: BL2: Loading image id 31 INFO: Loading

Trying to compile wpe-browser from meta-wpewebkit and during building cog I'm getting error:https://github.com/Igalia/meta-webkit/issues/446It seems that gcnano-userland-multi-binary-stm32mp provides gbm.h which clash with one from cog. I've resolved it by:`GPU_USERLAND_LIBRARIES_WAYLAND = "mesa"` adding to local.confand also by adding append for gcnano-userland-multi-binary-stm32mp.bbappendwith content:`GCNANO_PACKAGECONFIG:remove = "gbm"` but when I start wpe browser it display just white background and nothing more.Thanks.

I have a custom STM32MP157c board. I try to set fuse bits (3 0x23000000). It worked on the basic boot system but not on the TF-A boot system. I mean by example the boot command : fuse prog 0 3 0x23000000.

Hi!I am using a STM32MP157C-DK2 board to create an application on the screen. I have used STM32CubeIDE to create my own program:I have initialized peripheral with its default modeI have enabled FDCAN peripheralI have changed the clock settings.With this, I already have the device tree of my program (kernel, tf-a, optee-os and u-boot).My question is, do I have to create my own machine to configure clock setting? Thanks!

Hello!I've got a problem configuring USB OTG on a board based on the STM32MP157C. This is actually the Odyssey board by Seeed Studio, which is not directly supported by STLinux as far as I know. Actually we have custom hardware with the STM32MP157C SOM, but since the problem is reproducible on their development board, that is easier to follow for everybody else. I have already posted this question in their support forum but would like to hear your opinion as well.The Yocto firmware I am testing on is based on meta-st-stm32mp (openstlinux-5.10-dunfell-mp1-21-03-31). I got the same behavior with the hardknott branch which is not surprising since the kernel did not change.This is from the device tree:&usbh_ehci { phys = <&usbphyc_port0>; status = "okay"; };   &usbh_ohci{ status = "okay"; phys = <&usbphyc_port0>; };   &usbotg_hs { compatible = "st,stm32mp15-fsotg", "snps,dwc2"; pinctrl-names = "default"; /* configure OTG ID and full-speed da

Hello all!​We have implemented our custom driver that uses DMA to copy a large amount of data from the FMC interface (FPGA mapped to it) to the RAM.​For very fast data acquisition the setup time for new DMA transactions becomes critical.I tried an overlapping approach:https://community.st.com/s/question/0D53W0000274CNFSA2/stm32mdmac-fast-overlapped-dma-transaction-problem​But this did not work. Then I tried to use dmaengine_prep_dma_cyclic to copth the FPGA data into a larger coherent memory region. Then using dmaengine_prep_dma_memcpy to copy it to its final destination.But: the transaction created with dmaengine_prep_dma_cyclic does not want to start!dmaengine_prep_dma_memcpy works fine.I think this is because of the difference between software vs hardware triggered DMA transactions (memcopy. Looking into stm32-mdma.c is see that dmaengine_prep_dma_memcpy has its own setup routine whereas dmaengine_prep_dma_cyclic use stm32_mdma_set_xfer_param() that always configures a HW request.M

Hello community,we have the problem, that we need more code space for the M4 application and try now to get code area in SRAM2 (IPC area). What we've done so far:Decreased the number of vring buffers to the half: #define VRING_NUM_BUFFS 8 /* number of rpmsg buffer */Adapted the M4 linker file from 32K to 24KRAM2_ipc_shm (xrw) : ORIGIN = 0x10040000, LENGTH = 0x00006000 /* Length := 24K*/For the linux DT part we were not sure what exactly to do:First variant: vdev0 ring buffer to the halfvdev0vring0: vdev0vring0@10040000 {                                               compatible = "shared-dma-pool";                          &nbsp

In my current project, I am still using the older environment. Even though there are no urgencies to migrate to the newer environment, I want to prepare everything in advance.My current project uses an external module to generate a signature. it works very well with the older image because I only need to update the image's header section with the generated signature from the external module. However, the newer image prevents me to do this because it requires the private key to generate the certificate. The external security module won't allow me to retrieve the private key from the module. It only allows me to generate a signature or retrieve the public key. So, my only choice is to generate the certificate by myself and use the external module to sign the certificate. But after searching through the internet for days, I still cannot find that this is a possible option.Is it possible to generate the certificate by ourselves and embed the generated certificate into the FIP binary?Thank

“Error: failed to download Segment[0]�?I looked at the other items with the same title but did not see an answer that would help me.I am using the STM32MP157F-DK2The demo code was working when box was openedI tried to run the demo“Populate the target and boot the image�?athttps://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP157x-DK2I am using ecosystem release v3.1.0AndSTM32CubeProgrammer 2.9.0Down load eventually fails with “Error: failed to download Segment[0]�?Any help on the matter would be appreciated Below is the Log 10:53:37 : USB speed  : High Speed (480MBit/s) 10:53:37 : Manuf. ID  : STMicroelectronics 10:53:37 : Product ID : DFU in HS Mode @Device ID /0x500, @Revision ID /0x0000 10:53:37 : SN         : 002A001B3438511436383238 10:53:37 : FW version : 0x0110 10:53:37 : Board      : -- 10:53:37 : Device ID  : 0

Hello, I am trying to establish an interprocessor communication between the cores A7 and M4 with the with the Stm32MP157. The example from ST "OpenAMP_TTY_echo" works fine, but as soon as I change the received buffer or try to send a costomize buffer from the M4 side, it is not received correctly by the A7 anymore.This error happens even if I change only one character in the receive buffer.Does anyone have a clue what is going wrong?Thanks.

I am trying to use the USB OTG in host mode, but it kept giving me the famous HANG! Soft Reset timeout GRSTCTL_CSFTRST error.According to the datasheet, when we set the register, it should reset the core but also clear itself but the following condition checks if it is 0 or not. if ((hsotg->hw_params.snpsid & DWC2_CORE_REV_MASK) < (DWC2_CORE_REV_4_20a & DWC2_CORE_REV_MASK)) { if (dwc2_hsotg_wait_bit_clear(hsotg, GRSTCTL, GRSTCTL_CSFTRST, 10000)) { dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL_CSFTRST\n", __func__); return -EBUSY; }Here is some debugging that I have done GRSTCTL VALUE before reset: 0x80000400GRSTCTL VALUE after reset: 0x80000401GRSTCTL inside if condition: 0x80000001Here you can see, it has even cleared the 10th bit itself but did not clear the bit 0.Following is my device tree, I still consider myself a beginner, so I need help.&usbotg_hs{ u-boot,dm-pre-reloc; pinctrl-names = "default", "sleep"; pinctrl-0 = &l

I'm getting these errors on the consoles when FSBL (TF-A) is trying to download SSBL (U-Boot). What could this DFU error be? I've added the following to the U-Boot DTSI file so it ignore USB OTG VBUS and USB OTG ID. I've tried this using Linux and Windows with STProgrammer.&usbotg_hs { u-boot,force-b-session-valid; dr_mode = "peripheral"; };Console Output:   NOTICE: CPU: STM32MP157AAA Rev.Z NOTICE: (a)Model: STMicroelectronics custom STM32CubeMX board - openstlinux-5.15-yocto-kirkstone-mp1-v22. 06.15 NOTICE: board_id = 0 NOTICE: Board: Board ID is zero NOTICE: Checking fixed regulator register INFO: fixed_regulator_register() is the problem INFO: Entering the loop INFO: register fixed reg regulator-vdd! INFO: Node: 10728 NOTICE: Calling stm32mp1_syscfg_init() WARNING: VDD unknown NOTICE: Watchdog refresh NOTICE: BSEC read debug configuration NOTICE: Arch security setup INFO: Reset reason (0x4): INFO: Pad Reset from NRST NOTICE: Syscfg enable IO INFO: FCONF: Reading TB_FW

Hi,I am wondering if it is possible to internally connect two GPIO pins by software, not using wires.Thank you

Hi!I am using STM32MP157C-DK2 board to create an application on the screen (using GTK library). My idea is to start coprocessor firmware from the A7 application with the following commands (system commands):int main (int argc, char **argv) { GtkApplication *app;   system("su root -c 'echo core_communication_new_CM4.elf' > /sys/class/remoteproc/remoteproc0/firmware"); system("su root -c 'echo start' > /sys/class/remoteproc/remoteproc0/state");   app = gtk_application_new ("org.gtk.example", G_APPLICATION_FLAGS_NONE); g_signal_connect (app, "activate", G_CALLBACK (Window_info), NULL); status = g_application_run (G_APPLICATION (app), argc, argv); g_object_unref (app); return status; }With these two system commands, I want to boot the M4 firmware (core_communication_new_CM4.elf). Then, I initialize A7 program (probak_GTK) with the following command:su -l weston -c "/usr/local/probak_GTK"However, when I run the A7 application, I get the following message in the Linux

I've been validating my DDR interface with DDRUTIL through the CubeMX DDR Interactive which seems to pass the tests. When I boot TF-A it is failing both address bus testing for 1's and 0's. But I can run this same test through DDRUTIL and it passes. What am I overlooking here? As for DDR configuration in either case, the files are identical.Here are the results of doing an address bus test (which per the comments is exactly what TF-A is doing)DDR Interactive ResultsDDR test #4 (AddressBus) triggered with parameters: 4096 0xC0000000DDR test result: PassDDR test #4 (AddressBus) triggered with parameters: 67108864 0xC0000000DDR test result: PassDDR test #4 (AddressBus) triggered with parameters: 67108864 0xC2000000DDR test result: PassDDR test #4 (AddressBus) triggered with parameters: 67108864 0xC4000000DDR test result: PassDDR test #4 (AddressBus) triggered with parameters: 67108864 0xC8000000DDR test result: Pass

Hi,I started getting above errors recently, when trying to connect to an Android device.Can you elaborate on these errors on BLE?0x08 Connection timeout0x3E Connection failed to be establishedHow can I overcome them?Thanks

Hello , I followed 1 qt-wpe-simple-browserfrom here : https://wiki.st.com/stm32mpu/wiki/How_to_install_a_simple_web_browserbut getting the error in launching the browser on executing this command : qt-wpe-simple-browser http://google.com QQmlApplicationEngine failed to load components qrc:/main.qml:3:1:module "org.wpewebkit.qtwpe" is not installedwhich package i have to install?I am already connecteed to network and I am on Ecosystem 3.0regards,D

We're are trying to use BKPSRAM in application code insecurely. According to the stm32mpu BKPSRAM_internal_memory page, we need to "set BKPSRAM as non-secure and degrade low power modes support, removing Standby mode"Apart from setting the etzpc peripheral in the devicetree to non-secure [DECPROT(STM32MP1_ETZPC_BKPSRAM_ID, DECPROT_NS_RW, DECPROT_UNLOCK)]what else is necessary in TF-A?

Is it possible to run touchgfx on the STM32MP1?   TouchGfx can be run on the STM32F4 with the M4 core. Is this also possible on the M4 core of the MP1?   Is there any support from ST or has anyone already implemented this?