STM32 MPUs

An error appears when executing the crypto_skipher_decrypt(tfm)->decrypt(req) code inside the linux-custom directory of the buildroot. Some violation seems to occur when calling the decrypt(req) function. If I annotate that part, the error doesn't come up.I want to know the reason for the error and the solution.

I'm now trying to read OTP 13~15 from remoteproc driver to enc/decrypt m4 firmware.From NVMEM overview. I learn below informationOTP 13~15 are non-secured area​The name of device is "stm32-romem0"NVMEM kernel APII can successfully get OTP 13~15 from user space.To get OTP 13~15 in linux kernel I write code that read nvmem device with the NVMEM kernel API.I define a match function​​int rproc_nvmem_match(struct device *dev, const void *data){ const char *device_name = dev_name(dev); const char *p_name = data; int length = strlen(p_name);​ if (memcmp(p_name, device_name, length) != 0) return 0; return 1;}​​Then, use nvmem_device_find and nvmem_device_read to read OTP 13~15. ( I use offset both 0x5C005234 and 0x234. )​ u8 *buf_uniqueId; buf_uniqueId = kmalloc(24, GFP_KERNEL); struct nvmem_device *nvmem = nvmem_device_find("stm32-romem0", rproc_nvmem_match); int err = nvmem_device_read(nvmem, 0x234, 24, (void*)buf_uniqueId); if (!nvmem) printk("nvmem error"); printk("err : %d", err);​But I

Hi,I would like to make my STM32MP157 communicate with a FPGA in spi. I need to make long transfer (2-3 Mb) spi to get data acquired by the FPGA. But when I use the "spi_sync_transfer" function in my driver, I get the following kernel message:#spi_stm32 4000b000.spi: Overrun: RX data lost#spi0.0: SPI transfer failed: -5# spi_master spi0: failed to transfer one message from queueThis driver works on an ompa3 platform.I use a kernel linux 5.10, there is my device tree overlay :/dts-v1/; /plugin/; &spi2 { ifsttarhf8ch: ifsttarhf8ch@0 { compatible = "ifsttar,ifsttarhf8ch"; reg = <0>; spi-max-frequency = <100000000>; interrupt-parent = <&gpioi>; interrupts = <9 IRQ_TYPE_EDGE_RISING>; }; };and my device tree :#include "stm32mp157.dtsi" &spi2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&spi2_pins_mx>; pinctrl-1 = <&spi2_sleep_pins_mx>; cs-gpios = <&gpiob 9 0>, <&gpioi 1 0>, <&gpi

Hi, I would like to set all 8 pins in port Z to unsecure so i use these pins as other ports. I read data sheet portz is set to secure mode as default after reset. And I tried write into it and system crashed.Thanks

I am currently developing using STM32mp157fad and have a question. Here are the steps I have taken:Used STM32CubeProgrammer to upload the stm32mp157f-ev1 image to an SD card.Used STM32CubeMX to configure the GPIOs to be used with stm32mp157fad, generated code, and copied the device tree generated by the code generator to the SD card with OpenSTLinux installed.I'm wondering if this method is valid for use. If this is not the correct approach, I would like to know more information.

I am using UART over RS-485 on an STM32MP153AAB3.The communication fails because the actual baudrate is off from the specified baudrate. With a specified baudrate of 9600 Bits/s, I am getting an actual baudrate of 9970 Bits/s, as you can see here (time per Bit is 100.3µs instead of 104µs): Changing the baudrate to 115200 Bits/s results in a time per Bit of 8.33µs, i. e. 120000 Bits/s: I set the USART2,4 Clock in the .ioc file to 64 MHz and chose PCLK1 as the source.The value in the BRR register is 0x1A0B which, if I understand it correctly, should correspond to a value for USARTDIV of 416, giving a baudrate of 9615 Bits/s (64,000,000/(16*416) = 9615). My settings are as follows:static void MX_UART4_Init(void) { huart4.Instance = UART4; huart4.Init.BaudRate = 9600; huart4.Init.WordLength = UART_WORDLENGTH_8B; huart4.Init.StopBits = UART_STOPBITS_1; huart4.Init.Parity = UART_PARITY_NONE; huart4.Init.Mode = UART_MODE_TX_RX; huart4.Init.HwFlowCtl = UART_HWCONTROL_RTS; hua

Hello, I use Optee on a stm32mp157f-dk2 board, version is the and the corresponding BSP :optee-os 3.16.0-stm32mpu-boot v2021.10-stm32mpLinux v5.15-stm32mpAll my changes are committed and built using a yocto meta-layer : https://github.com/embetrix/meta-stm32mp15xthe Optee build config is described here : https://github.com/embetrix/meta-stm32mp15x/blob/kirkstone/recipes-security/optee/optee-os-stm32mp_3.16.0.bb#L33I enabled the PKCS11 TA which is by the way not by default enabled and gave it a try:EC Prime256 Keypair generation:# time pkcs11-tool --keypairgen --key-type EC:prime256v1 --label "testkeyEC" --id 1 --login --usage-sign --module /usr/lib/libckteec.so.0 Using slot 0 with a present token (0x0) Key pair generated: Private Key Object; EC label: testkeyEC ID: 01 Usage: sign Access: sensitive, always sensitive, never extractable, local Public Key Object; EC EC_POINT 256 bits EC_POINT: 044104d7506303c183c36445ef2d5161a5cfe1effaeb12a7b41ef458bc27811d2ddd915518917cd385ec35720324

Hi All!! I am currently using openstlinux-5.10-dunfell-mp1-21-11-17 for EV1. My idea is upgrade kernel version to 5.15 and keep u-boot-2020.10 and tf-a-2.4. My problem is that only upgrading the kernel and dtb, the kernel crashes and doesn't show any log traces (added boot.log).   Is there any dependency (or API break) between kernel and bootloaders(U-boot/Tf-a)? I would like to know if it have fix

I want the cortex-m4 to do pwmget data from sensors and transfer to cortex-A7So, I write simple code to do PWM and find out the RCC in stm32cubeIDE not work because linux take control the clock config.My question is, What is the best way to configure clock In my situation.Is it better to modify clock on linux command? or would it better to modity it in device tree?and where can I find the manual to modify it on devicetree?Thanks

Hi,I try to connect ADC channels with libiio for my custom board based on the stm32mp157caa3. I followed the instructions from the linkhttps://wiki.st.com/stm32mpu/wiki/IIO_libiiohttps://wiki.st.com/stm32mpu/wiki/ADC_device_tree_configuration#DT_configuration_examplesbut without success. After issuing the consoleiio_infoI getLibrary version: 0.23 (git tag: 92d6a35) Compiled with backends: local xml ip usb serial IIO context created with local backend. Backend version: 0.23 (git tag: 92d6a35) Backend description string: Linux stm32mp1-connect-bridge 5.15.67 #1 SMP PREEMPT Thu Sep 8 10:32:54 UTC 2022 armv7l IIO context has 2 attributes: local,kernel: 5.15.67 uri: local: IIO context has 0 devices:The same is in /sys/bus/iio/devices/empty, with no devices.Part of my dts looks&adc{ pinctrl-names = "default", "sleep"; pinctrl-0 = <&adc_pins_mx>; pinctrl-1 = <&adc_sleep_pins_mx>; status = "okay";   /* USER CODE BEGIN adc */ vdda-supply = <&vdda>;

Hi,​I upgraded the image for our custom board to 4.1 last week. After fixing the sw issuesconcerning the recipe syntax changes i have now problems to boot the new image.​Info: Our board does not use PMIC but static voltage configuration:​/ { model = "DEWETRON NEXDAQ tf-a"; compatible = "st,stm32mp157f-nexio", "st,stm32mp157";   aliases { serial0 = &uart4; serial1 = &usart1; serial2 = &usart2; };   chosen { stdout-path = "serial0:115200n8"; };   /* Supply Voltages */ vddcore: vddcore { regulator-name = "vddcore"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1350000>; regulator-always-on; };   vdd: vdd { regulator-name = "vdd"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; };   v3v3: v3v3 { regulator-name = "v3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-o

Can ST please provide a guide for bringing up a custom board without using the STPMIC? We are extremely space constrained and unable to fit the PMIC. For our use case we just want simple LDO's with bucks as required.There is no material I can find that outlines what the device tree should look like for TF-A, U-Boot and Kernel when STPMIC is omitted.

I have a small project under GPL v2 license which will not necessarily be used on STM device (maybe, but most likely not).   There is a "Design Tip (DT0085)" which have some reference source code and I want to use it in my project (esp. page 7). I can't figure out which license is used in this document for the source code.   Can I use the source code or it parts from DT0085 in my project?

We are bringing up a custom board with LPDDR2 and no STPMIC. I have been following the bring up guide and have gotten past disabling I2C4 and fixing the HSE clock issue in the device tree. I have merged in quite a few things from dev kit 'working' devicetrees as well.I am stuck at the following TF-A error though.Data Abort at: 0x2fff3e20 DFSR = 0x00000206 DFAR = 0x3664647fAbort at: 0x2ffe93a0I have used devtool to modify the tf-a recipe and increase the DEBUG level but nothing I do makes any difference. I just get this error.Attached is the flattened ftd from the TF-A build dir along with the cubemx generated set of devicetrees for tf-a.

I am puzzled with a curious build problem:The recipe gcc-arm-none-eabi-native downloads gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2 but the download finishes to early (at 100MB instead of 150MB). Therefore the checksum check fails.BUT:If I copy the SRC_URL:SRC_URI = "https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2;name=gcc-arm-x86"into a browser or use wget the download completes successfully. Also the sha256 sum is correct then.Anyone experienced similar problems? Currently I will try to add a bbappend recipe to inject the archive as local file.My systems:Ubuntu 22.04 LTSAlternatively docker container with 22.04BB_NUMBER_THREADS="16" PARALLEL_MAKE="-j 16" bitbake gcc-arm-none-eabi-native NOTE: Started PRServer with DBfile: /home/glaure/Development/SW_APP/nexio_tmp/ost-5.15/build/cache/prserv.sqlite3, Address: 127.0.0.1:41099, PID: 1439493 Loading cache: 100% |#############################################

Datasheet says STM32MP15xx has ADC but here seem no ADC.​I am not sure if I am missing something.​

In my device tree, we config 400KHz, but on scope we see only ~ 50Hz, and the clock seems weird. Anyone know why? &i2c1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c1_pins_a>; pinctrl-1 = <&i2c1_sleep_pins_a>; i2c-scl-rising-time-ns = <185>; i2c-scl-falling-time-ns = <20>; clock-frequency = <400000>; status = "okay"; /delete-property/dmas; /delete-property/dma-names;};

We can use devmem to read/write all gpio port registers except for portZ.We know this port relates to secure. is there any way to remove secure feature on this port so we can use devmem on this port?Thanks

gtk-launch: error while loading shared libraries: libEGL.so.1: cannot open shared object file: No such file or directory.

Hey,I was able to successfully flash the Starter Package following this article and after building the OpenSTLinux distribution following this, I'm having trouble with flashing it. After completeing the build process, inside the flashlayout_st-image-weston, there are 3 folders optee, extensible and deleteall. I was looking for trusted folder like in starter package but it is not available. Then I tried to follow article found here with cube programmer interface and through terminal with FlashLayout_sdcard_stm32mp157f-dk2-optee.tsv but i'm getting following error.Error: failed to download Segment[0]   Error: failed to download the File   Error: Download partition 0x05 failed   Error: TSV flashing service failedAfter that I tried to flash with FlashLayout_sdcard_stm32mp157c-dk2-optee.tsv in Starter Package but it also showed the same issue. I have attached the cube programmer terminal output. Apreciate if anyone can help me with this.Thanks.

I'm using a custom stm32mp157a board with a DSI display.If I enable uart8 using pins J8 (UART8_TX) and J9 (UART8_RX) the display driver (panel-sitronix-st7701.c) doesnt load properly and the display stays blank. uart8 does work properly. If I disable uart8 the display works again.

Noob here..I'm aware I can to access the Cortex-M4 as STMCubeIDE generates both a project and code for it. But the generated project for the A7 is empty. I am only able to access the A7 using Linux? I am currently using Windows.

We recently udated from OpenSTLinux v2.1 to v4.1. The boot chain is solid, but occasionally we are getting TEE aborts (trace listed below). I am not sure exactly how to debug this, any help would be appreciated. E/TC:1 E/TC:1  Core data-abort at address 0x2fff8805 (translation fault) E/TC:1   fsr 0x00000207 ttbr0 0x2ffd8020 ttbr1 0x00000000 cidr 0x0 E/TC:1   cpu #1         cpsr 0x000001f3 E/TC:1   r0 0x2fff8805     r4 0x2ffda889   r8 0x2ffda889  r12 0xffffffe0 E/TC:1   r1 0x2ffcda91     r5 0x000000f7   r9 0x00000000   sp 0x2ffda788 E/TC:1   r2 0x2fff8805     r6 0x00000000  r10 0x2fff8805   lr 0x2ffcb297 E/TC:1   r3 0x2fff8806     r7 0x2ffda870 &n

Hi there, I am building custom board with openstlinux distribution package with following configBuild Configuration:BB_VERSION          = "2.0.0"BUILD_SYS           = "x86_64-linux"NATIVELSBSTRING     = "universal"TARGET_SYS          = "arm-ostl-linux-gnueabi"MACHINE             = "stm32mp1-silico"DISTRO              = "openstlinux-weston"DISTRO_VERSION      = "4.0.4-snapshot-20230428"TUNE_FEATURES       = "arm vfp cortexa7 neon vfpv4 thumb callconvention-hard"TARGET_FPU          = "hard"DISTRO_CODENAME     = "kirkstone"ACCEPT_EULA_st

Hello ,I want to build android distribution for STM32MP157F-dk2.ST-Android delivery only support STM32MP157C-EV1 and STM32MP157F-EV1 Evaluation board (aosp_eval).how can i create my own distribution for STM32MP157F-dk2 target